Show patches with: Search = RISC-V       |    Archived = No       |   3475 patches
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Patch Series rb/tb S/W/F Date Submitter Delegate State
[v2,0/1] RISC-V: Add RVV (RISC-V 'V' Extension) support - - --- 2022-05-31 钟居哲 None
[00/21] *** Add RVV (RISC-V 'V' Extension) support *** - - --- 2022-05-31 钟居哲 None
[v2] RISC-V: bitmanip: improve constant-loading for (1ULL << 31) in DImode [v2] RISC-V: bitmanip: improve constant-loading for (1ULL << 31) in DImode - - --- 2022-05-29 Philipp Tomsich Committed
[v3,0/9,RISC-V] Atomics improvements - - --- 2022-05-27 Christoph Müllner None
[v3] RISC-V/testsuite: constraint some of tests to hard_float [v3] RISC-V/testsuite: constraint some of tests to hard_float - - --- 2022-05-27 Vineet Gupta Committed
RISC-V: Add -mtune=thead-c906 to the invoke docs RISC-V: Add -mtune=thead-c906 to the invoke docs - - --- 2022-05-26 Palmer Dabbelt Committed
RISC-V: Don't unconditionally add m,a,f,d in arch-canonicalize RISC-V: Don't unconditionally add m,a,f,d in arch-canonicalize - - --- 2022-05-25 Simon Cook Committed
[v1,2/3] RISC-V: Split slli+sh[123]add.uw opportunities to avoid zext.w RISC-V: Improve sequences with shifted zero-extended operands - - --- 2022-05-24 Philipp Tomsich Committed
[v1,1/3] RISC-V: add consecutive_bits_operand predicate RISC-V: Improve sequences with shifted zero-extended operands - - --- 2022-05-24 Philipp Tomsich Committed
[v1,0/3] RISC-V: Improve sequences with shifted zero-extended operands - - --- 2022-05-24 Philipp Tomsich None
[PR/target,105666] RISC-V: Inhibit FP <--> int register moves via tune param [PR/target,105666] RISC-V: Inhibit FP <--> int register moves via tune param - - --- 2022-05-23 Vineet Gupta Committed
[v3,0/3] RISC-V: Support z[f/d]inx extension - - --- 2022-05-23 Jiawei None
[v3,0/3] RISC-V: Support z[f/d]inx extension - - --- 2022-05-23 Jiawei None
[v2,1/1] RISC-V: Fix canonical extension order (K and J) RISC-V: Fix canonical extension order (K and J) - - --- 2022-05-22 Tsukasa OI Committed
[v2,0/1] RISC-V: Fix canonical extension order (K and J) - - --- 2022-05-22 Tsukasa OI None
[committed] wwwdocs: gcc-12: Fix HTML around RISC-V entries [committed] wwwdocs: gcc-12: Fix HTML around RISC-V entries - - --- 2022-05-21 Gerald Pfeifer Committed
[v3] RISC-V: Implement C[LT]Z_DEFINED_VALUE_AT_ZERO [v3] RISC-V: Implement C[LT]Z_DEFINED_VALUE_AT_ZERO - - --- 2022-05-13 Philipp Tomsich Committed
testsuite: opt: Fix const7.C for RISC-V. testsuite: opt: Fix const7.C for RISC-V. - - --- 2022-05-13 Jiawei Committed
[RESEND,committed,v4] RISC-V: Provide `fmin'/`fmax' RTL patterns [RESEND,committed,v4] RISC-V: Provide `fmin'/`fmax' RTL patterns - - --- 2022-05-10 Maciej W. Rozycki Committed
[V4,3/3] RISC-V:Cache Management Operation instructions testcases RISC-V:Add mininal support for Zicbo[mzp] - - --- 2022-05-10 yulong Committed
[V4,1/3] RISC-V: Add mininal support for Zicbo[mzp] RISC-V:Add mininal support for Zicbo[mzp] - - --- 2022-05-10 yulong Committed
[V4,0/3] RISC-V:Add mininal support for Zicbo[mzp] - - --- 2022-05-10 yulong None
[V3,1/3] RISC-V: Add mininal support for Zicbo[mzp] RISC-V:Add mininal support for Zicbo[mzp] - - --- 2022-05-09 yulong Committed
[V3,0/3] RISC-V:Add mininal support for Zicbo[mzp] - - --- 2022-05-09 yulong None
testsuite: btf: Fix btf-datasec-1.c for RISC-V testsuite: btf: Fix btf-datasec-1.c for RISC-V - - --- 2022-05-04 Palmer Dabbelt Committed
[wwwdocs] gcc-12/changes.html: Document the RISC-V libstdc++ -latomic detection [wwwdocs] gcc-12/changes.html: Document the RISC-V libstdc++ -latomic detection - - --- 2022-04-28 Palmer Dabbelt Committed
[committed,wwwdocs] gcc-12/changes.html: Document RISC-V changes [committed,wwwdocs] gcc-12/changes.html: Document RISC-V changes - - --- 2022-04-28 Kito Cheng Committed
[0/1] RISC-V: Fix canonical extension order (K and J) - - --- 2022-04-24 Tsukasa OI None
[v3] RISC-V: Add support for inlining subword atomic operations [v3] RISC-V: Add support for inlining subword atomic operations - - --- 2022-04-19 Patrick O'Neill Superseded
[committed] RISC-V: Support -misa-spec for arch-canonicalize and multilib-generator. [PR104853] [committed] RISC-V: Support -misa-spec for arch-canonicalize and multilib-generator. [PR104853] - - --- 2022-04-11 Kito Cheng Committed
[committed] RISC-V: Sync arch-canonicalize and riscv-common.cc [committed] RISC-V: Sync arch-canonicalize and riscv-common.cc - - --- 2022-04-11 Kito Cheng Committed
[v1] libstdc++: Default to mutex-based atomics on RISC-V [v1] libstdc++: Default to mutex-based atomics on RISC-V - - --- 2022-04-07 Palmer Dabbelt Committed
[0/3] RISC-V: Add Ratified Cache Management Operation ISA Extensions - - --- 2022-03-25 yulong@nj.iscas.ac.cn None
[committed] RISC-V: Implement misc macro for vector extensions. [committed] RISC-V: Implement misc macro for vector extensions. - - --- 2022-03-21 Kito Cheng Committed
[0/3] RISC-V: Add Ratified Cache Management Operation ISA Extensions - - --- 2022-03-04 yulong@nj.iscas.ac.cn None
[0/5,V1] RISC-V:Implement Crypto extension's instruction patterns and it's intrinsics - - --- 2022-02-23 Liao Shihua None
[v4,GCC13] RISC-V: Provide `fmin'/`fmax' RTL patterns [v4,GCC13] RISC-V: Provide `fmin'/`fmax' RTL patterns - - --- 2022-02-08 Maciej W. Rozycki Committed
[v1] RISC-V: Add support for inlining subword atomic operations [v1] RISC-V: Add support for inlining subword atomic operations - - --- 2022-02-08 Patrick O'Neill Superseded
[committed] RISC-V: Fix detection of zifencei support for binutils [committed] RISC-V: Fix detection of zifencei support for binutils - - --- 2022-02-05 Kito Cheng Committed
[v2] doc: RISC-V: Document the `-misa-spec=' option [v2] doc: RISC-V: Document the `-misa-spec=' option 1 - --- 2022-02-04 Maciej W. Rozycki Committed
RISC-V/testsuite: Run target testing over all the usual optimization levels RISC-V/testsuite: Run target testing over all the usual optimization levels - - --- 2022-01-31 Maciej W. Rozycki Committed
RISC-V: Add target machine headers as a dependency for riscv-sr.o RISC-V: Add target machine headers as a dependency for riscv-sr.o - - --- 2022-01-31 Maciej W. Rozycki Committed
RISC-V: Document `auipc' and `bitmanip' `type' attributes RISC-V: Document `auipc' and `bitmanip' `type' attributes - - --- 2022-01-27 Maciej W. Rozycki Committed
RISC-V: Always pass -misa-spec to assembler [PR104219] RISC-V: Always pass -misa-spec to assembler [PR104219] - - --- 2022-01-25 Kito Cheng Committed
[committed] RISC-V: Do not emit zcisr and zifencei if i-ext is 2.0 [committed] RISC-V: Do not emit zcisr and zifencei if i-ext is 2.0 - - --- 2022-01-24 Kito Cheng Committed
[committed] RISC-V: Fix testcase after bump isa spec version [committed] RISC-V: Fix testcase after bump isa spec version - - --- 2022-01-24 Kito Cheng Committed
RISC-V: Update testcases info with new implement info RISC-V: Update testcases info with new implement info - - --- 2022-01-19 Liao Shihua Committed
RISC-V: Document the degree of position independence that medany affords RISC-V: Document the degree of position independence that medany affords - - --- 2022-01-18 Palmer Dabbelt Committed
RISC-V: Fix use-after-free error in `parse_multiletter_ext' RISC-V: Fix use-after-free error in `parse_multiletter_ext' - - --- 2022-01-18 Maciej W. Rozycki Committed
RISC-V: Change default ISA version into 20191213 RISC-V: Change default ISA version into 20191213 - - --- 2022-01-18 Jiawei Committed
[1/2] RISC-V: Allow extension name contain digit RISC-V: Vector extensions support - - --- 2021-12-03 Kito Cheng Committed
[0/2] RISC-V: Vector extensions support - - --- 2021-12-03 Kito Cheng None
RISC-V: jal cannot refer to a default visibility symbol for shared object. RISC-V: jal cannot refer to a default visibility symbol for shared object. - - --- 2021-11-29 Nelson Chu Committed
[v2,2/2] RISC-V: Add implied defines of Zk, Zkn and Zks RISC-V: add gcc support for Scalar Cryptography v1.0.0-rc6 - - --- 2021-11-22 siyu@isrc.iscas.ac.cn Committed
[v2,1/2] RISC-V: Add option defines for Scalar Cryptography RISC-V: add gcc support for Scalar Cryptography v1.0.0-rc6 - - --- 2021-11-22 siyu@isrc.iscas.ac.cn Committed
[v2,0/2] RISC-V: add gcc support for Scalar Cryptography v1.0.0-rc6 - - --- 2021-11-22 siyu@isrc.iscas.ac.cn None
[committed] RISC-V: Fix wrong zifencei handling in riscv_subset_list::to_string [committed] RISC-V: Fix wrong zifencei handling in riscv_subset_list::to_string - - --- 2021-11-11 Kito Cheng Committed
[v2,0/3] RISC-V: Support zfinx extension - - --- 2021-11-05 Jiawei None
[committed,v2] RISC-V: Fix build errors with shNadd/shNadd.uw patterns in zba cost model [committed,v2] RISC-V: Fix build errors with shNadd/shNadd.uw patterns in zba cost model - - --- 2021-11-02 Maciej W. Rozycki Committed
RISC-V: Fix register class subset checks for CLASS_MAX_NREGS RISC-V: Fix register class subset checks for CLASS_MAX_NREGS - - --- 2021-11-02 Maciej W. Rozycki Committed
[00/21] RISC-V: add gcc support for Scalar Cryptography v1.0.0-rc5 - - --- 2021-10-31 siyu@isrc.iscas.ac.cn None
[0/3] RISC-V: Zfinx extension support - - --- 2021-10-28 Jiawei None
[committed] RISC-V: Fix wrong predicator for zero_extendsidi2_internal pattern [committed] RISC-V: Fix wrong predicator for zero_extendsidi2_internal pattern - - --- 2021-10-28 Kito Cheng Committed
[committed] RISC-V: Handle zi* extension correctly for arch-canonicalize script [committed] RISC-V: Handle zi* extension correctly for arch-canonicalize script - - --- 2021-10-28 Kito Cheng Committed
RISC-V: Pattern name fix mul*3_highpart -> smul*3_highpart. RISC-V: Pattern name fix mul*3_highpart -> smul*3_highpart. - - --- 2021-09-28 Jim Wilson Committed
[RFC,8/8] RISC-V: Cost model for ZBS extension. RISC-V: Bit-manipulation extension. - - --- 2021-09-23 Kito Cheng Committed
[RFC,7/8] RISC-V: Implement instruction patterns for ZBS extension. RISC-V: Bit-manipulation extension. - - --- 2021-09-23 Kito Cheng Committed
[RFC,6/8] RISC-V: Use li and rori to load constants. RISC-V: Bit-manipulation extension. - - --- 2021-09-23 Kito Cheng Committed
[RFC,5/8] RISC-V: Cost model for zbb extension. RISC-V: Bit-manipulation extension. - - --- 2021-09-23 Kito Cheng Committed
[RFC,4/8] RISC-V: Implement instruction patterns for ZBB extension. RISC-V: Bit-manipulation extension. - - --- 2021-09-23 Kito Cheng Committed
[RFC,3/8] RISC-V: Cost model for zba extension. RISC-V: Bit-manipulation extension. - - --- 2021-09-23 Kito Cheng Committed
[RFC,2/8] RISC-V: Implement instruction patterns for ZBA extension. RISC-V: Bit-manipulation extension. - - --- 2021-09-23 Kito Cheng Committed
[RFC,1/8] RISC-V: Minimal support of bitmanip extension RISC-V: Bit-manipulation extension. - - --- 2021-09-23 Kito Cheng Committed
[RFC,0/8] RISC-V: Bit-manipulation extension. - - --- 2021-09-23 Kito Cheng None
[0/2,v3] New target hook TARGET_COMPUTE_MULTILIB and implementation for RISC-V - - --- 2021-09-16 Kito Cheng None
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