diff mbox series

[committed] RISC-V: Fix testcase after bump isa spec version

Message ID 20220124095029.8744-1-kito.cheng@sifive.com
State Committed
Commit c106529eb219976426eeb9b3e47ad7f496e89b0e
Headers
Series [committed] RISC-V: Fix testcase after bump isa spec version |

Commit Message

Kito Cheng Jan. 24, 2022, 9:50 a.m. UTC 
  Extension version might be different among different ISA spec version,
add explicitly isa-spec version to prevent that might fail when build
GCC with different default ISA version.

gcc/testsuite/ChangeLog

	* gcc.target/riscv/attribute-19.c: Add -misa-spec=2.2
---
 gcc/testsuite/gcc.target/riscv/attribute-19.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/riscv/attribute-19.c b/gcc/testsuite/gcc.target/riscv/attribute-19.c
index 18f68d98561..562f8089361 100644
--- a/gcc/testsuite/gcc.target/riscv/attribute-19.c
+++ b/gcc/testsuite/gcc.target/riscv/attribute-19.c
@@ -1,4 +1,4 @@ 
 /* { dg-do compile } */
-/* { dg-options "-mriscv-attribute -march=rv64imp0p9 -mabi=lp64" } */
+/* { dg-options "-mriscv-attribute -march=rv64imp0p9 -mabi=lp64 -misa-spec=2.2" } */
 int foo() {}
 /* { dg-final { scan-assembler ".attribute arch, \"rv64i2p0_m2p0_p0p9\"" } } */