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[0/3] RISC-V: Zfinx extension support

Message ID 20211028135246.9699-1-jiawei@iscas.ac.cn
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jiawei Oct. 28, 2021, 1:52 p.m. UTC
  Zfinx extension[1] had already finished public review. Here is the implementation patch set that reuse floating point pattern and ban the use of fpr when use zfinx as a target.

Current works can be find in follow links, we will keep update zhinx and zhinxmin after zfh extension goes upstream.
  https://github.com/pz9115/riscv-gcc/tree/zfinx-rebase
  https://github.com/pz9115/riscv-binutils-gdb/tree/zfinx-rebase

For test you can use qemu or spike that support zfinx extension, the
qemu will go upstream soon and spike is still in review:
  https://github.com/plctlab/plct-qemu/tree/plct-zfinx-dev
  https://github.com/plctlab/plct-spike/tree/plct-upstream-zfinx  

Thanks for Tariq Kurd, Kito Cheng, Jim Willson, Jeremy Bennett helped us a lot with this work.

[1] https://github.com/riscv/riscv-zfinx/blob/main/zfinx-1.0.0-rc.pdf

jiawei sinan (3):
  RISC-V: Minimal support of zfinx extension
  RISC-V: Target support for zfinx extension
  RISC-V: Imply info and regs limit for zfinx extension

 gcc/common/config/riscv/riscv-common.c |  6 +++
 gcc/config/riscv/arch-canonicalize     |  1 +
 gcc/config/riscv/constraints.md        |  3 +-
 gcc/config/riscv/riscv-builtins.c      |  4 +-
 gcc/config/riscv/riscv-c.c             |  2 +-
 gcc/config/riscv/riscv-opts.h          |  6 +++
 gcc/config/riscv/riscv.c               | 15 +++++-
 gcc/config/riscv/riscv.md              | 72 +++++++++++++-------------
 gcc/config/riscv/riscv.opt             |  3 ++
 9 files changed, 70 insertions(+), 42 deletions(-)