diff mbox series

RISC-V: Always pass -misa-spec to assembler [PR104219]

Message ID 20220125130442.23646-1-kito.cheng@sifive.com
State Committed
Commit 06e32a5ebf20c11dd31bc2677bede569fef84316
Headers
Series RISC-V: Always pass -misa-spec to assembler [PR104219] |

Commit Message

Kito Cheng Jan. 25, 2022, 1:04 p.m. UTC 
  Add -misa-spec to OPTION_DEFAULT_SPECS to make sure -misa-spec will
always pass that into assembler, that prevent GCC and binutils using
different way to interpret the ISA string.

gcc/ChangeLog:

	PR target/104219
	* config.gcc (riscv*-*-*): Normalize the with_isa_spec value.
	(all_defaults): Add isa_spec.
	* config/riscv/riscv.h (OPTION_DEFAULT_SPECS): Add isa_spec.
---
 gcc/config.gcc           | 4 +++-
 gcc/config/riscv/riscv.h | 2 ++
 2 files changed, 5 insertions(+), 1 deletion(-)

Comments

Martin Liška Feb. 4, 2022, 12:55 p.m. UTC | #1 
May I please PING this?

Thanks,
Martin

On 1/25/22 14:04, Kito Cheng wrote:
> Add -misa-spec to OPTION_DEFAULT_SPECS to make sure -misa-spec will
> always pass that into assembler, that prevent GCC and binutils using
> different way to interpret the ISA string.
> 
> gcc/ChangeLog:
> 
> 	PR target/104219
> 	* config.gcc (riscv*-*-*): Normalize the with_isa_spec value.
> 	(all_defaults): Add isa_spec.
> 	* config/riscv/riscv.h (OPTION_DEFAULT_SPECS): Add isa_spec.
> ---
>   gcc/config.gcc           | 4 +++-
>   gcc/config/riscv/riscv.h | 2 ++
>   2 files changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/gcc/config.gcc b/gcc/config.gcc
> index 90aec3f8f3f..0bb8c63a46e 100644
> --- a/gcc/config.gcc
> +++ b/gcc/config.gcc
> @@ -4643,12 +4643,14 @@ case "${target}" in
>   		case "${with_isa_spec}" in
>   		""|default|20191213|201912)
>   			tm_defines="${tm_defines} TARGET_DEFAULT_ISA_SPEC=ISA_SPEC_CLASS_20191213"
> +			with_isa_spec=20191213
>   			;;
>   		2.2)
>   			tm_defines="${tm_defines} TARGET_DEFAULT_ISA_SPEC=ISA_SPEC_CLASS_2P2"
>   			;;
>   		20190608 | 201906)
>   			tm_defines="${tm_defines} TARGET_DEFAULT_ISA_SPEC=ISA_SPEC_CLASS_20190608"
> +			with_isa_spec=20190608
>   			;;
>   		*)
>   			echo "--with-isa-spec only accept 2.2, 20191213, 201912, 20190608 or 201906" 1>&2
> @@ -5430,7 +5432,7 @@ case ${target} in
>   esac
>   
>   t=
> -all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt synci tls lxc1-sxc1 madd4"
> +all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt synci tls lxc1-sxc1 madd4 isa_spec"
>   for option in $all_defaults
>   do
>   	eval "val=\$with_"`echo $option | sed s/-/_/g`
> diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
> index 695668424c3..8a4d2cf7f85 100644
> --- a/gcc/config/riscv/riscv.h
> +++ b/gcc/config/riscv/riscv.h
> @@ -60,6 +60,7 @@ extern const char *riscv_default_mtune (int argc, const char **argv);
>      --with-arch is ignored if -march or -mcpu is specified.
>      --with-abi is ignored if -mabi is specified.
>      --with-tune is ignored if -mtune or -mcpu is specified.
> +   --with-isa-spec is ignored if -misa-spec is specified.
>   
>      But using default -march/-mtune value if -mcpu don't have valid option.  */
>   #define OPTION_DEFAULT_SPECS \
> @@ -70,6 +71,7 @@ extern const char *riscv_default_mtune (int argc, const char **argv);
>   	   "  %{!mcpu=*:-march=%(VALUE)}"				\
>   	   "  %{mcpu=*:%:riscv_expand_arch_from_cpu(%* %(VALUE))}}" },	\
>     {"abi", "%{!mabi=*:-mabi=%(VALUE)}" }, \
> +  {"isa_spec", "%{!misa-spec=*:-misa-spec=%(VALUE)}" }, \
>   
>   #ifdef IN_LIBGCC2
>   #undef TARGET_64BIT
Kito Cheng Feb. 5, 2022, 8:54 a.m. UTC | #2 
Committed to trunk :)

On Fri, Feb 4, 2022 at 8:56 PM Martin Liška <mliska@suse.cz> wrote:
>
> May I please PING this?
>
> Thanks,
> Martin
>
> On 1/25/22 14:04, Kito Cheng wrote:
> > Add -misa-spec to OPTION_DEFAULT_SPECS to make sure -misa-spec will
> > always pass that into assembler, that prevent GCC and binutils using
> > different way to interpret the ISA string.
> >
> > gcc/ChangeLog:
> >
> >       PR target/104219
> >       * config.gcc (riscv*-*-*): Normalize the with_isa_spec value.
> >       (all_defaults): Add isa_spec.
> >       * config/riscv/riscv.h (OPTION_DEFAULT_SPECS): Add isa_spec.
> > ---
> >   gcc/config.gcc           | 4 +++-
> >   gcc/config/riscv/riscv.h | 2 ++
> >   2 files changed, 5 insertions(+), 1 deletion(-)
> >
> > diff --git a/gcc/config.gcc b/gcc/config.gcc
> > index 90aec3f8f3f..0bb8c63a46e 100644
> > --- a/gcc/config.gcc
> > +++ b/gcc/config.gcc
> > @@ -4643,12 +4643,14 @@ case "${target}" in
> >               case "${with_isa_spec}" in
> >               ""|default|20191213|201912)
> >                       tm_defines="${tm_defines} TARGET_DEFAULT_ISA_SPEC=ISA_SPEC_CLASS_20191213"
> > +                     with_isa_spec=20191213
> >                       ;;
> >               2.2)
> >                       tm_defines="${tm_defines} TARGET_DEFAULT_ISA_SPEC=ISA_SPEC_CLASS_2P2"
> >                       ;;
> >               20190608 | 201906)
> >                       tm_defines="${tm_defines} TARGET_DEFAULT_ISA_SPEC=ISA_SPEC_CLASS_20190608"
> > +                     with_isa_spec=20190608
> >                       ;;
> >               *)
> >                       echo "--with-isa-spec only accept 2.2, 20191213, 201912, 20190608 or 201906" 1>&2
> > @@ -5430,7 +5432,7 @@ case ${target} in
> >   esac
> >
> >   t=
> > -all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt synci tls lxc1-sxc1 madd4"
> > +all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt synci tls lxc1-sxc1 madd4 isa_spec"
> >   for option in $all_defaults
> >   do
> >       eval "val=\$with_"`echo $option | sed s/-/_/g`
> > diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
> > index 695668424c3..8a4d2cf7f85 100644
> > --- a/gcc/config/riscv/riscv.h
> > +++ b/gcc/config/riscv/riscv.h
> > @@ -60,6 +60,7 @@ extern const char *riscv_default_mtune (int argc, const char **argv);
> >      --with-arch is ignored if -march or -mcpu is specified.
> >      --with-abi is ignored if -mabi is specified.
> >      --with-tune is ignored if -mtune or -mcpu is specified.
> > +   --with-isa-spec is ignored if -misa-spec is specified.
> >
> >      But using default -march/-mtune value if -mcpu don't have valid option.  */
> >   #define OPTION_DEFAULT_SPECS \
> > @@ -70,6 +71,7 @@ extern const char *riscv_default_mtune (int argc, const char **argv);
> >          "  %{!mcpu=*:-march=%(VALUE)}"                               \
> >          "  %{mcpu=*:%:riscv_expand_arch_from_cpu(%* %(VALUE))}}" },  \
> >     {"abi", "%{!mabi=*:-mabi=%(VALUE)}" }, \
> > +  {"isa_spec", "%{!misa-spec=*:-misa-spec=%(VALUE)}" }, \
> >
> >   #ifdef IN_LIBGCC2
> >   #undef TARGET_64BIT
>
diff mbox series

Patch

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 90aec3f8f3f..0bb8c63a46e 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -4643,12 +4643,14 @@  case "${target}" in
 		case "${with_isa_spec}" in
 		""|default|20191213|201912)
 			tm_defines="${tm_defines} TARGET_DEFAULT_ISA_SPEC=ISA_SPEC_CLASS_20191213"
+			with_isa_spec=20191213
 			;;
 		2.2)
 			tm_defines="${tm_defines} TARGET_DEFAULT_ISA_SPEC=ISA_SPEC_CLASS_2P2"
 			;;
 		20190608 | 201906)
 			tm_defines="${tm_defines} TARGET_DEFAULT_ISA_SPEC=ISA_SPEC_CLASS_20190608"
+			with_isa_spec=20190608
 			;;
 		*)
 			echo "--with-isa-spec only accept 2.2, 20191213, 201912, 20190608 or 201906" 1>&2
@@ -5430,7 +5432,7 @@  case ${target} in
 esac
 
 t=
-all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt synci tls lxc1-sxc1 madd4"
+all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt synci tls lxc1-sxc1 madd4 isa_spec"
 for option in $all_defaults
 do
 	eval "val=\$with_"`echo $option | sed s/-/_/g`
diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
index 695668424c3..8a4d2cf7f85 100644
--- a/gcc/config/riscv/riscv.h
+++ b/gcc/config/riscv/riscv.h
@@ -60,6 +60,7 @@  extern const char *riscv_default_mtune (int argc, const char **argv);
    --with-arch is ignored if -march or -mcpu is specified.
    --with-abi is ignored if -mabi is specified.
    --with-tune is ignored if -mtune or -mcpu is specified.
+   --with-isa-spec is ignored if -misa-spec is specified.
 
    But using default -march/-mtune value if -mcpu don't have valid option.  */
 #define OPTION_DEFAULT_SPECS \
@@ -70,6 +71,7 @@  extern const char *riscv_default_mtune (int argc, const char **argv);
 	   "  %{!mcpu=*:-march=%(VALUE)}"				\
 	   "  %{mcpu=*:%:riscv_expand_arch_from_cpu(%* %(VALUE))}}" },	\
   {"abi", "%{!mabi=*:-mabi=%(VALUE)}" }, \
+  {"isa_spec", "%{!misa-spec=*:-misa-spec=%(VALUE)}" }, \
 
 #ifdef IN_LIBGCC2
 #undef TARGET_64BIT