Show patches with: Archived = No       |   2001 patches
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Patch Series rb/tb S/W/F Date Submitter Delegate State
gprofng: 30834 improve disassembly output for call and branch instructions gprofng: 30834 improve disassembly output for call and branch instructions - - 4-- 2023-09-21 Vladimir Mezentsev New
[RFC,9/9] gas: testsuite: add a x86_64 testsuite for SCFI SCFI implementation in GNU assembler - - 4-- 2023-09-20 Indu Bhagat New
[RFC,8/9] gas: synthesize CFI for hand-written asm SCFI implementation in GNU assembler - - 4-- 2023-09-20 Indu Bhagat New
[RFC,7/9] gas: scfidw2gen: new functionality to prepapre for SCFI SCFI implementation in GNU assembler - - 4-- 2023-09-20 Indu Bhagat New
[RFC,6/9] gas: dw2gencfi: ignore all .cfi_* directives with --scfi=all SCFI implementation in GNU assembler - - 4-- 2023-09-20 Indu Bhagat New
[RFC,5/9] gas: add new command line option --scfi[=all,none] SCFI implementation in GNU assembler - - 4-- 2023-09-20 Indu Bhagat New
[RFC,4/9] gas: dw2gencfi: move some tc_* defines to the header file SCFI implementation in GNU assembler - - 4-- 2023-09-20 Indu Bhagat New
[RFC,3/9] gas: dw2gencfi: expose a new cfi_set_last_fde API SCFI implementation in GNU assembler - - 4-- 2023-09-20 Indu Bhagat New
[RFC,2/9] gas: dw2gencfi: use all_cfi_sections instead of cfi_sections SCFI implementation in GNU assembler - - 4-- 2023-09-20 Indu Bhagat New
[RFC,1/9] gas: dw2gencfi: minor rejig for cfi_sections_set and all_cfi_sections SCFI implementation in GNU assembler - - 4-- 2023-09-20 Indu Bhagat New
[v2] RISC-V: emit R_RISCV_RELAX for the la pseudo instruction [v2] RISC-V: emit R_RISCV_RELAX for the la pseudo instruction - - 4-- 2023-09-20 Rui Ueyama New
elf-attrs.c memory allocation fail elf-attrs.c memory allocation fail - - -4- 2023-09-19 Alan Modra New
readelf.c 'ext' may be used uninitialized readelf.c 'ext' may be used uninitialized - - -4- 2023-09-19 Alan Modra New
[v2,4/4] x86: fold F16C VEX and EVEX templates x86: fold a number of VEX and EVEX templates - - 4-- 2023-09-19 Jan Beulich New
[v2,3/4] x86: fold FMA VEX and EVEX templates x86: fold a number of VEX and EVEX templates - - 4-- 2023-09-19 Jan Beulich New
[v2,2/4] x86: fold VAES/VPCLMULQDQ VEX and EVEX templates x86: fold a number of VEX and EVEX templates - - 4-- 2023-09-19 Jan Beulich New
[v2,1/4] x86: fold certain VEX and EVEX templates x86: fold a number of VEX and EVEX templates - - 4-- 2023-09-19 Jan Beulich New
[8/8] Support APX JMPABS Support Intel APX EGPR - - 4-- 2023-09-19 Frager, Neal via Binutils New
[7/8] Support APX NF Support Intel APX EGPR - - 4-- 2023-09-19 Frager, Neal via Binutils New
[6/8] Support APX Push2/Pop2 Support Intel APX EGPR - - 4-- 2023-09-19 Frager, Neal via Binutils New
[5/8] Support APX NDD optimized encoding. Support Intel APX EGPR - - 4-- 2023-09-19 Frager, Neal via Binutils New
[4/8] Support APX NDD Support Intel APX EGPR - - 4-- 2023-09-19 Frager, Neal via Binutils New
[3/8] Add tests for APX GPR32 with extend evex prefix Support Intel APX EGPR - - 4-- 2023-09-19 Frager, Neal via Binutils New
[2/8] Support APX GPR32 with extend evex prefix Support Intel APX EGPR - - 4-- 2023-09-19 Frager, Neal via Binutils New
[1/8] Support APX GPR32 with rex2 prefix Support Intel APX EGPR - - 4-- 2023-09-19 Frager, Neal via Binutils New
[7/7] Support APX JMPABS Support Intel APX EGPR - - --- 2023-09-19 Frager, Neal via Binutils New
[4/7] Support APX NDD optimized encoding. Support Intel APX EGPR - - --- 2023-09-19 Frager, Neal via Binutils New
[3/7] Support APX NDD Support Intel APX EGPR - - --- 2023-09-19 Frager, Neal via Binutils New
[7/7] arc: Add new opcode functions for ARCv3 ISA. arc: Add new ARCv3 isa support to ARC's backend - - 4-- 2023-09-19 Claudiu Zissulescu Ianculescu New
[6/7] arc: Update ARC's Gnu Assembler backend with ARCv3 ISA. arc: Add new ARCv3 isa support to ARC's backend - - 4-- 2023-09-19 Claudiu Zissulescu Ianculescu New
[5/7] arc: Update opcode related include files for ARCv3. arc: Add new ARCv3 isa support to ARC's backend - - 4-- 2023-09-19 Claudiu Zissulescu Ianculescu New
[4/7] arc: Add new linker emulation and scripts for ARCv3 ISA. arc: Add new ARCv3 isa support to ARC's backend - - 4-- 2023-09-19 Claudiu Zissulescu Ianculescu New
[3/7] arc: Add new ARCv3 ISA to BFD. arc: Add new ARCv3 isa support to ARC's backend - - 4-- 2023-09-19 Claudiu Zissulescu Ianculescu New
[2/7] arc: Add new LD tests for ARCv3. arc: Add new ARCv3 isa support to ARC's backend - - 4-- 2023-09-19 Claudiu Zissulescu Ianculescu New
[1/7] arc: Add new GAS tests for ARCv3. arc: Add new ARCv3 isa support to ARC's backend - - 4-- 2023-09-19 Claudiu Zissulescu Ianculescu New
RISC-V: emit R_RISCV_RELAX for the la pseudo instruction RISC-V: emit R_RISCV_RELAX for the la pseudo instruction - - 4-- 2023-09-19 Rui Ueyama New
[v3] ld: write resolved path to included file to dependency-file [v3] ld: write resolved path to included file to dependency-file - - 4-- 2023-09-18 Thomas Weißschuh New
Fix emit-relocs for aarch64 gold Fix emit-relocs for aarch64 gold - - 4-- 2023-09-18 Vladislav Khmelevsky Committed
[v3] Add support for "pcaddi rd, symbol" [v3] Add support for "pcaddi rd, symbol" - - 4-- 2023-09-18 mengqinggang New
[v2,2/2] ld: write full paths to dependency-file Improve handling of included linker scripts in dependency-file - - 4-- 2023-09-16 Thomas Weißschuh New
[v2,1/2] ld: write resolved path to included file to dependency-file Improve handling of included linker scripts in dependency-file - - 4-- 2023-09-16 Thomas Weißschuh New
RISC-V: Support Tag_RISCV_x3_reg_usage. RISC-V: Support Tag_RISCV_x3_reg_usage. - - 4-- 2023-09-15 Nelson Chu New
[committed] arc: Fix alignment of the TLS Translation Control Block [committed] arc: Fix alignment of the TLS Translation Control Block - - -4- 2023-09-15 Claudiu Zissulescu Ianculescu New
[3/3] x86: prefer VEX encodings over EVEX ones when possible x86: improve encoding selection and prereq tidying - - 4-- 2023-09-15 Jan Beulich New
[2/3] x86: drop cpu_arch_tune_flags x86: improve encoding selection and prereq tidying - - 4-- 2023-09-15 Jan Beulich New
[1/3] x86: correct cpu_arch_isa_flags maintenance x86: improve encoding selection and prereq tidying - - 4-- 2023-09-15 Jan Beulich New
[RFC,4/4] x86: fold F16C VEX and EVEX templates x86: fold a number of VEX and EVEX templates - - 4-- 2023-09-15 Jan Beulich New
[RFC,3/4] x86: fold FMA VEX and EVEX templates x86: fold a number of VEX and EVEX templates - - 4-- 2023-09-15 Jan Beulich New
[2/4] x86: fold VAES/VPCLMULQDQ VEX and EVEX templates x86: fold a number of VEX and EVEX templates - - 4-- 2023-09-15 Jan Beulich New
[1/4] x86: fold certain VEX and EVEX templates x86: fold a number of VEX and EVEX templates - - 4-- 2023-09-15 Jan Beulich New
Avoid unused space in .rela.dyn if sec was discarded Avoid unused space in .rela.dyn if sec was discarded - - 2-2 2023-09-15 Jinyang He New
ld: write full path to included file to dependency-file ld: write full path to included file to dependency-file - - 4-- 2023-09-14 Thomas Weißschuh New
[v3] libctf: ctf_member_next needs to return (ssize_t)-1 on error [v3] libctf: ctf_member_next needs to return (ssize_t)-1 on error - - 4-- 2023-09-13 Torbjorn SVENSSON New
[v2,2/2] RISC-V: Add support for XCValu extension in CV32E40P RISC-V: Support CORE-V XCVMAC and XCVALU extensions - - --4 2023-09-12 Mary Bennett New
[v2,1/2] RISC-V: Add support for XCVmac extension in CV32E40P RISC-V: Support CORE-V XCVMAC and XCVALU extensions - - --4 2023-09-12 Mary Bennett New
[REVIEW,ONLY,v3,1/1] UNRATIFIED RISC-V: Add 'Smrnmi' extension and its CSRs RISC-V (unratified): Add 'Smrnmi' extension - - 4-- 2023-09-12 Tsukasa OI New
[REVIEW,ONLY,v2,1/1] UNRATIFIED RISC-V: Add CLIC extensions with CSRs UNRATIFIED RISC-V: Add support for Core-Local Interrupt Controller (CLIC) extensions and their CSRs - - 4-- 2023-09-12 Tsukasa OI New
[pushed] aarch64: Remove unused function [pushed] aarch64: Remove unused function - - -4- 2023-09-08 Richard Sandiford Committed
[4/4] x86: fold CpuLM and Cpu64 x86: Cpu64 / CpuNo64 adjustments - - 4-- 2023-09-08 Jan Beulich New
[3/4] x86: don't play with cpu_arch_flags.cpu{,no}64 x86: Cpu64 / CpuNo64 adjustments - - 4-- 2023-09-08 Jan Beulich New
[2/4] x86: make code size vs CPU arch checking consistent x86: Cpu64 / CpuNo64 adjustments - - 4-- 2023-09-08 Jan Beulich New
[1/4] x86: re-order update_code_flag() x86: Cpu64 / CpuNo64 adjustments - - 4-- 2023-09-08 Jan Beulich New
x86: Vxy naming correction x86: Vxy naming correction - - 4-- 2023-09-08 Jan Beulich New
[3/3] aarch64: system register aliasing detection aarch64: standardize system register representation - - 4-- 2023-09-08 Victor Do Nascimento Superseded
[2/3] aarch64: macroize archictectural feature union in SYSREG aarch64: standardize system register representation - - 3-1 2023-09-08 Victor Do Nascimento Superseded
[1/3] AArch64: Refactor system register data aarch64: standardize system register representation - - 3-1 2023-09-08 Victor Do Nascimento Superseded
Set insn_type for branch instructions on aarch64 Set insn_type for branch instructions on aarch64 - - 4-- 2023-09-07 Vladimir Mezentsev Committed
[Committed] RISC-V: Clarify the naming rules of vendor operands. [Committed] RISC-V: Clarify the naming rules of vendor operands. - - 13- 2023-09-07 Nelson Chu New
PR30828, notes obstack memory corruption PR30828, notes obstack memory corruption - - -4- 2023-09-06 Alan Modra New
Handle "efi-app-riscv64" and similar targets in objcopy. Handle "efi-app-riscv64" and similar targets in objcopy. 1 - 4-- 2023-09-06 Peter Jones New
[committed] src-release.sh (SIM_SUPPORT_DIRS): Add libsframe, libctf/swap.h and gnulib [committed] src-release.sh (SIM_SUPPORT_DIRS): Add libsframe, libctf/swap.h and gnulib - - -4- 2023-09-06 Hans-Peter Nilsson New
[users/roland/gold-charnn] gold: Use char16_t, char32_t instead of uint16_t, uint32_t as character … [users/roland/gold-charnn] gold: Use char16_t, char32_t instead of uint16_t, uint32_t as character … - - --4 2023-09-05 Roland McGrath New
[2/2] RISC-V: Add support for XCValu extension in CV32E40P RISC-V: Support CORE-V XCVMAC and XCVALU extensions - - 4-- 2023-09-05 Mary Bennett New
[1/2] RISC-V: Add support for XCVmac extension in CV32E40P RISC-V: Support CORE-V XCVMAC and XCVALU extensions - - 4-- 2023-09-05 Mary Bennett New
[v3,3/3] RISC-V: Add RV64E support to GDB [v3,1/3] RISC-V: Remove RV64E conflict - - 4-- 2023-09-05 Tsukasa OI New
[v3,2/3] RISC-V: Add "lp64e" ABI support [v3,1/3] RISC-V: Remove RV64E conflict - - 4-- 2023-09-05 Tsukasa OI New
[v3,1/3] RISC-V: Remove RV64E conflict [v3,1/3] RISC-V: Remove RV64E conflict - - 4-- 2023-09-05 Tsukasa OI New
[v2,3/3] x86: support AVX10.1 vector size restrictions x86: AVX10.1 (alternative attempt) - - 4-- 2023-09-05 Jan Beulich New
[v2,2/3] x86: support AVX10.1/512 x86: AVX10.1 (alternative attempt) - - 4-- 2023-09-05 Jan Beulich New
[v2,1/3] x86: make AES/PCMULQDQ respectively prereqs of VAES/VPCMULQDQ x86: AVX10.1 (alternative attempt) - - 4-- 2023-09-05 Jan Beulich New
[COMMITTED] RISC-V: Fix typo in the testsuite [COMMITTED] RISC-V: Fix typo in the testsuite - - -4- 2023-09-05 Tsukasa OI New
[v3,2/2] LoongArch: ld: Fix other pop relocs overflow check and add tests [v3,1/2] LoongArch: bfd: Correct the name of R_LARCH_SOP_POP_32_U in howto_table - - 2-2 2023-09-05 Jinyang He New
[v3,1/2] LoongArch: bfd: Correct the name of R_LARCH_SOP_POP_32_U in howto_table [v3,1/2] LoongArch: bfd: Correct the name of R_LARCH_SOP_POP_32_U in howto_table - - 4-- 2023-09-05 Jinyang He New
RISC-V: Use the right PLT address when making a new entry RISC-V: Use the right PLT address when making a new entry - - --4 2023-09-04 Hau Hsu New
[REVIEW,ONLY,1/1] RISC-V: Add stub support for the 'Svadu' extension RISC-V: Add stub support for the 'Svadu' extension - - 4-- 2023-09-03 Tsukasa OI New
[1/1] RISC-V: Add 'Smcntrpmf' extension and its CSRs RISC-V: Add 'Smcntrpmf' extension and its CSRs - - 4-- 2023-09-03 Tsukasa OI New
[v2,2/2] LoongArch: ld: Fix other pop relocs overflow check and add tests [v2,1/2] LoongArch: bfd: Correct the name of R_LARCH_SOP_POP_32_U in howto_table - - 2-2 2023-09-02 Jinyang He New
[v2,1/2] LoongArch: bfd: Correct the name of R_LARCH_SOP_POP_32_U in howto_table [v2,1/2] LoongArch: bfd: Correct the name of R_LARCH_SOP_POP_32_U in howto_table - - 4-- 2023-09-02 Jinyang He New
Fix 30808 gprofng tests failed Fix 30808 gprofng tests failed - - 4-- 2023-09-01 Frager, Neal via Binutils New
arm: Make 'conflicting CPU architectures' error message more user-friendly arm: Make 'conflicting CPU architectures' error message more user-friendly - - 4-- 2023-09-01 Christophe Lyon Committed
RISC-V: fold duplicate code in vector_macro() RISC-V: fold duplicate code in vector_macro() - - 4-- 2023-09-01 Jan Beulich New
x86: restrict prefix use with .insn VEX/XOP/EVEX x86: restrict prefix use with .insn VEX/XOP/EVEX - - 4-- 2023-09-01 Jan Beulich New
[2/2] regen ld/Makefile.in [1/2] Fix variable naming: ELF_CLFAGS -> ELF_CFLAGS - - 22- 2023-09-01 Jerry Zhang Jian New
[1/2] Fix variable naming: ELF_CLFAGS -> ELF_CFLAGS [1/2] Fix variable naming: ELF_CLFAGS -> ELF_CFLAGS - - -4- 2023-09-01 Jerry Zhang Jian New
[2/2] Add testcase for generation of 32/64_PCREL. [1/2] Use 32/64_PCREL to replace a pair of ADD32/64 and SUB32/64. - - 4-- 2023-09-01 Lulu Cai New
[1/2] Use 32/64_PCREL to replace a pair of ADD32/64 and SUB32/64. [1/2] Use 32/64_PCREL to replace a pair of ADD32/64 and SUB32/64. - - 4-- 2023-09-01 Lulu Cai New
[v2,5/5] RISC-V: Initial ld.bfd support for TLSDESC. RISC-V: Implement TLS Descriptors. - - 4-- 2023-08-31 Tatsuyuki Ishi New
[v2,4/5] RISC-V: Define and use GOT entry size constants for TLS. RISC-V: Implement TLS Descriptors. - - 4-- 2023-08-31 Tatsuyuki Ishi New
[v2,3/5] RISC-V: Add assembly support for TLSDESC. RISC-V: Implement TLS Descriptors. - - 4-- 2023-08-31 Tatsuyuki Ishi New
[v2,2/5] RISC-V: Add TLSDESC reloc definitions. RISC-V: Implement TLS Descriptors. - - 4-- 2023-08-31 Tatsuyuki Ishi New
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