On 19.09.2023 17:25, Cui, Lili wrote:
> --- a/gas/config/tc-i386.c
> +++ b/gas/config/tc-i386.c
> @@ -3880,6 +3880,7 @@ is_any_apx_encoding (void)
> || i.tm.opcode_space == SPACE_EVEXMAP4
> || i.has_nf
> || i.has_zero_upper
> + || i.tm.mnem_off == MN_jmpabs
> || (i.vex.register_specifier
> && i.vex.register_specifier->reg_flags & RegRex2);
> }
> @@ -3887,7 +3888,8 @@ is_any_apx_encoding (void)
> static INLINE bool
> is_any_apx_rex2_encoding (void)
> {
> - return (i.rex2 && i.vex.length == 2) || i.rex2_encoding;
> + return (i.rex2 && i.vex.length == 2) || i.rex2_encoding
> + || i.tm.mnem_off == MN_jmpabs;
> }
These are getting both too complex for my taste, when they - iirc - sit
on a relatively common (and hence hot) path.
> @@ -7703,7 +7705,7 @@ match_template (char mnem_suffix)
> if (!quiet_warnings)
> {
> if (!intel_syntax
> - && (i.jumpabsolute != (t->opcode_modifier.jump == JUMP_ABSOLUTE)))
> + && (i.jumpabsolute != (t->opcode_modifier.jump == JUMP_ABSOLUTE) && t->mnem_off != MN_jmpabs))
Nit: Too long line. But - does this need changing? JMPABS isn't an
indirect jump.
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/apx-mov-inval.l
> @@ -0,0 +1,2 @@
> +.* Assembler messages:
> +.*:5: Error: unsupport rex2 pseudo prefix for `mov'
What is this new file doing here, entirely in isolation?
> @@ -2057,7 +2061,7 @@ static const struct dis386 dis386[] = {
> { "lahf", { XX }, 0 },
> /* a0 */
> { "mov%LB", { AL, Ob }, 0 },
> - { "mov%LS", { eAX, Ov }, 0 },
> + { "mov%LS", { { JMPABS_Fixup, eAX_reg }, { JMPABS_Fixup, v_mode } }, 0 },
> { "mov%LB", { Ob, AL }, 0 },
> { "mov%LS", { Ov, eAX }, 0 },
> { "movs{b|}", { Ybr, Xb }, 0 },
> @@ -9690,6 +9694,15 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax)
> goto out;
> }
>
> + if (ins.jmpabs
> + && ((ins.prefixes & (PREFIX_OPCODE | PREFIX_ADDR)) != 0x0
> + || (ins.rex2_payload & 0x8) != 0x0))
> + {
> + i386_dis_printf (info, dis_style_text, "(bad)");
> + ret = ins.end_codep - priv.the_buffer;
> + goto out;
> + }
Why can't this be dealt with in JMPABS_Fixup()?
> --- a/opcodes/i386-opc.tbl
> +++ b/opcodes/i386-opc.tbl
> @@ -161,7 +161,7 @@
>
> // Move instructions.
> mov, 0xa0, No64, D|W|CheckOperandSize|No_sSuf|No_qSuf, { Disp16|Disp32|Unspecified|Byte|Word|Dword, Acc|Byte|Word|Dword }
> -mov, 0xa0, x64, D|W|CheckOperandSize|No_sSuf, { Disp64|Unspecified|Byte|Word|Dword|Qword, Acc|Byte|Word|Dword|Qword }
> +mov, 0xa0, x64, D|W|CheckOperandSize|No_sSuf|No_egpr, { Disp64|Unspecified|Byte|Word|Dword|Qword, Acc|Byte|Word|Dword|Qword }
Isn't this (and perhaps more) needed already earlier? And can't
that be generalized to treating egpr as invalid for everything that
doesn't have Modrm?
> movabs, 0xa0, x64, D|W|CheckOperandSize|No_sSuf, { Disp64|Unspecified|Byte|Word|Dword|Qword, Acc|Byte|Word|Dword|Qword }
Plus, why would this one not need a similar adjustment?
Jan
> On 19.09.2023 17:25, Cui, Lili wrote:
> > --- a/gas/config/tc-i386.c
> > +++ b/gas/config/tc-i386.c
> > @@ -3880,6 +3880,7 @@ is_any_apx_encoding (void)
> > || i.tm.opcode_space == SPACE_EVEXMAP4
> > || i.has_nf
> > || i.has_zero_upper
> > + || i.tm.mnem_off == MN_jmpabs
> > || (i.vex.register_specifier
> > && i.vex.register_specifier->reg_flags & RegRex2); } @@ -3887,7
> > +3888,8 @@ is_any_apx_encoding (void) static INLINE bool
> > is_any_apx_rex2_encoding (void) {
> > - return (i.rex2 && i.vex.length == 2) || i.rex2_encoding;
> > + return (i.rex2 && i.vex.length == 2) || i.rex2_encoding
> > + || i.tm.mnem_off == MN_jmpabs;
> > }
>
> These are getting both too complex for my taste, when they - iirc - sit on a
> relatively common (and hence hot) path.
>
Have modified.
>
> > @@ -7703,7 +7705,7 @@ match_template (char mnem_suffix)
> > if (!quiet_warnings)
> > {
> > if (!intel_syntax
> > - && (i.jumpabsolute != (t->opcode_modifier.jump ==
> JUMP_ABSOLUTE)))
> > + && (i.jumpabsolute != (t->opcode_modifier.jump == JUMP_ABSOLUTE)
> > +&& t->mnem_off != MN_jmpabs))
>
> Nit: Too long line. But - does this need changing? JMPABS isn't an indirect jump.
>
Have modified. Yes, JMPABS isn't an indirect jump. But we use jmpabs like jmpabs $123. So i.jumpabsolute == false.
>
> > --- /dev/null
> > +++ b/gas/testsuite/gas/i386/apx-mov-inval.l
> > @@ -0,0 +1,2 @@
> > +.* Assembler messages:
> > +.*:5: Error: unsupport rex2 pseudo prefix for `mov'
>
> What is this new file doing here, entirely in isolation?
>
In the new patch structure, "mov" related changes are all eliminated (and I don't remember why they're here).
>
> > @@ -2057,7 +2061,7 @@ static const struct dis386 dis386[] = {
> > { "lahf", { XX }, 0 },
> > /* a0 */
> > { "mov%LB", { AL, Ob }, 0 },
> > - { "mov%LS", { eAX, Ov }, 0 },
> > + { "mov%LS", { { JMPABS_Fixup, eAX_reg }, { JMPABS_Fixup,
> v_mode } }, 0 },
> > { "mov%LB", { Ob, AL }, 0 },
> > { "mov%LS", { Ov, eAX }, 0 },
> > { "movs{b|}", { Ybr, Xb }, 0 },
> > @@ -9690,6 +9694,15 @@ print_insn (bfd_vma pc, disassemble_info *info, int
> intel_syntax)
> > goto out;
> > }
> >
> > + if (ins.jmpabs
> > + && ((ins.prefixes & (PREFIX_OPCODE | PREFIX_ADDR)) != 0x0
> > + || (ins.rex2_payload & 0x8) != 0x0))
> > + {
> > + i386_dis_printf (info, dis_style_text, "(bad)");
> > + ret = ins.end_codep - priv.the_buffer;
> > + goto out;
> > + }
>
> Why can't this be dealt with in JMPABS_Fixup()?
>
Have modified.
BRs,
Lin
@@ -3880,6 +3880,7 @@ is_any_apx_encoding (void)
|| i.tm.opcode_space == SPACE_EVEXMAP4
|| i.has_nf
|| i.has_zero_upper
+ || i.tm.mnem_off == MN_jmpabs
|| (i.vex.register_specifier
&& i.vex.register_specifier->reg_flags & RegRex2);
}
@@ -3887,7 +3888,8 @@ is_any_apx_encoding (void)
static INLINE bool
is_any_apx_rex2_encoding (void)
{
- return (i.rex2 && i.vex.length == 2) || i.rex2_encoding;
+ return (i.rex2 && i.vex.length == 2) || i.rex2_encoding
+ || i.tm.mnem_off == MN_jmpabs;
}
static INLINE bool
@@ -7703,7 +7705,7 @@ match_template (char mnem_suffix)
if (!quiet_warnings)
{
if (!intel_syntax
- && (i.jumpabsolute != (t->opcode_modifier.jump == JUMP_ABSOLUTE)))
+ && (i.jumpabsolute != (t->opcode_modifier.jump == JUMP_ABSOLUTE) && t->mnem_off != MN_jmpabs))
as_warn (_("indirect %s without `*'"), insn_name (t));
if (t->opcode_modifier.isprefix
new file mode 100644
@@ -0,0 +1,3 @@
+.* Assembler messages:
+.*:5: Error: `jmpabs' is only supported in 64-bit mode
+.*:6: Error: `jmpabs' is only supported in 64-bit mode
new file mode 100644
@@ -0,0 +1,6 @@
+# Check 32bit illegal APX_F JMPABS instructions
+
+ .text
+ _start:
+ jmpabs $0x0202020202020202
+ jmpabs $0x2
new file mode 100644
@@ -0,0 +1,2 @@
+.* Assembler messages:
+.*:5: Error: unsupport rex2 pseudo prefix for `mov'
@@ -508,6 +508,7 @@ if [gas_32_check] then {
run_dump_test "sm4-intel"
run_list_test "pbndkb-inval"
run_list_test "apx-push2pop2-inval"
+ run_list_test "apx-jmpabs-inval"
run_list_test "sg"
run_dump_test "clzero"
run_dump_test "invlpgb"
new file mode 100644
@@ -0,0 +1,14 @@
+#as:
+#objdump: -dw -Mintel
+#name: x86_64 APX_F JMPABS insns (Intel disassembly)
+#source: x86-64-apx-jmpabs.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*d5 00 a1 02 02 02 02 02 02 02 02\s+jmpabs 0x202020202020202
+\s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00\s+jmpabs 0x2
+\s*[a-f0-9]+:\s*d5 00 a1 02 02 02 02 02 02 02 02\s+jmpabs 0x202020202020202
+\s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00\s+jmpabs 0x2
new file mode 100644
@@ -0,0 +1,55 @@
+#as: --64
+#objdump: -dw
+#name: illegal decoding of APX_F jmpabs insns
+#source: x86-64-apx-jmpabs-inval.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <.text>:
+\s*[a-f0-9]+: 66 64 d5 00 a1\s+\(bad\)
+\s*[a-f0-9]+: 01 00\s+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: 66 d5 00 a1\s+\(bad\)
+\s*[a-f0-9]+: 01 00\s+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: 67 64 d5 00 a1\s+\(bad\)
+\s*[a-f0-9]+: 01 00\s+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: 67 d5 00 a1\s+\(bad\)
+\s*[a-f0-9]+: 01 00\s+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: f2 64 d5 00 a1\s+\(bad\)
+\s*[a-f0-9]+: 01 00\s+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: f2 d5 00 a1\s+\(bad\)
+\s*[a-f0-9]+: 01 00\s+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: f3 64 d5 00 a1\s+\(bad\)
+\s*[a-f0-9]+: 01 00\s+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: f3 d5 00 a1\s+\(bad\)
+\s*[a-f0-9]+: 01 00\s+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: d5 08 a1\s+\(bad\)
+\s*[a-f0-9]+: 01 00\s+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\)
+\s*...
new file mode 100644
@@ -0,0 +1,18 @@
+# Check bytecode of APX_F jmpabs instructions with illegal encode.
+
+ .allow_index_reg
+ .text
+# With 66 prefix
+ .byte 0x66,0x64,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+ .byte 0x66,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+# With 67 prefix
+ .byte 0x67,0x64,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+ .byte 0x67,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+# With F2 prefix
+ .byte 0xf2,0x64,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+ .byte 0xf2,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+# With F3 prefix
+ .byte 0xf3,0x64,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+ .byte 0xf3,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+# REX2.M0 = 0 REX2.W = 1
+ .byte 0xd5,0x08,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
new file mode 100644
@@ -0,0 +1,14 @@
+#as:
+#objdump: -dw
+#name: x86_64 APX_F JMPABS insns
+#source: x86-64-apx-jmpabs.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*d5 00 a1 02 02 02 02 02 02 02 02\s+jmpabs \$0x202020202020202
+\s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00\s+jmpabs \$0x2
+\s*[a-f0-9]+:\s*d5 00 a1 02 02 02 02 02 02 02 02\s+jmpabs \$0x202020202020202
+\s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00\s+jmpabs \$0x2
new file mode 100644
@@ -0,0 +1,10 @@
+# Check 64bit APX_F JMPABS instructions
+
+ .text
+ _start:
+ jmpabs $0x0202020202020202
+ jmpabs $0x2
+
+.intel_syntax noprefix
+ jmpabs 0x0202020202020202
+ jmpabs 0x2
new file mode 100644
@@ -0,0 +1,2 @@
+.* Assembler messages:
+.*:5: Error: unsupport rex2 pseudo prefix for `mov'
new file mode 100644
@@ -0,0 +1,5 @@
+# Check 64bit illegal APX_F mov instructions with rex2 prefix
+
+ .text
+ _start:
+ {rex2} mov %fs:0x0202020202020202, %rax
@@ -374,6 +374,10 @@ run_dump_test "x86-64-apx-evex-egpr"
run_dump_test "x86-64-apx-ndd"
run_dump_test "x86-64-apx-nf"
run_dump_test "x86-64-apx-nf-intel"
+run_dump_test "x86-64-apx-jmpabs"
+run_dump_test "x86-64-apx-jmpabs-intel"
+run_dump_test "x86-64-apx-jmpabs-inval"
+run_list_test "x86-64-apx-mov-inval"
run_dump_test "x86-64-avx512f-rcigrz-intel"
run_dump_test "x86-64-avx512f-rcigrz"
run_dump_test "x86-64-clwb"
@@ -105,6 +105,7 @@ static bool FXSAVE_Fixup (instr_info *, int, int);
static bool MOVSXD_Fixup (instr_info *, int, int);
static bool DistinctDest_Fixup (instr_info *, int, int);
static bool PREFETCHI_Fixup (instr_info *, int, int);
+static bool JMPABS_Fixup (instr_info *, int, int);
static void ATTRIBUTE_PRINTF_3 i386_dis_printf (const disassemble_info *,
enum disassembler_style,
@@ -260,6 +261,9 @@ struct instr_info
char scale_char;
enum x86_64_isa isa64;
+
+ /* Remember if the current op is jmpabs instructions. */
+ bool jmpabs;
};
struct dis_private {
@@ -2057,7 +2061,7 @@ static const struct dis386 dis386[] = {
{ "lahf", { XX }, 0 },
/* a0 */
{ "mov%LB", { AL, Ob }, 0 },
- { "mov%LS", { eAX, Ov }, 0 },
+ { "mov%LS", { { JMPABS_Fixup, eAX_reg }, { JMPABS_Fixup, v_mode } }, 0 },
{ "mov%LB", { Ob, AL }, 0 },
{ "mov%LS", { Ov, eAX }, 0 },
{ "movs{b|}", { Ybr, Xb }, 0 },
@@ -9690,6 +9694,15 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax)
goto out;
}
+ if (ins.jmpabs
+ && ((ins.prefixes & (PREFIX_OPCODE | PREFIX_ADDR)) != 0x0
+ || (ins.rex2_payload & 0x8) != 0x0))
+ {
+ i386_dis_printf (info, dis_style_text, "(bad)");
+ ret = ins.end_codep - priv.the_buffer;
+ goto out;
+ }
+
switch (dp->prefix_requirement)
{
case PREFIX_DATA:
@@ -13877,3 +13890,30 @@ PREFETCHI_Fixup (instr_info *ins, int bytemode, int sizeflag)
return OP_M (ins, bytemode, sizeflag);
}
+
+static bool
+JMPABS_Fixup (instr_info *ins, int bytemode, int sizeflag)
+{
+ if (ins->address_mode == mode_64bit
+ && ins->last_rex2_prefix >= 0
+ && (ins->rex2_payload & 0x80) == 0x0)
+ {
+ uint64_t op;
+
+ if (bytemode == eAX_reg)
+ return true;
+
+ if (!get64 (ins, &op))
+ return false;
+
+ ins->mnemonicendp = stpcpy (ins->obuf, "jmpabs");
+ ins->all_prefixes[ins->last_rex2_prefix] = 0;
+ ins->jmpabs = true;
+ oappend_immediate (ins, op);
+ return true;
+ }
+
+ if (bytemode == eAX_reg)
+ return OP_IMREG (ins, bytemode, sizeflag);
+ return OP_OFF64 (ins, v_mode, sizeflag);
+}
@@ -161,7 +161,7 @@
// Move instructions.
mov, 0xa0, No64, D|W|CheckOperandSize|No_sSuf|No_qSuf, { Disp16|Disp32|Unspecified|Byte|Word|Dword, Acc|Byte|Word|Dword }
-mov, 0xa0, x64, D|W|CheckOperandSize|No_sSuf, { Disp64|Unspecified|Byte|Word|Dword|Qword, Acc|Byte|Word|Dword|Qword }
+mov, 0xa0, x64, D|W|CheckOperandSize|No_sSuf|No_egpr, { Disp64|Unspecified|Byte|Word|Dword|Qword, Acc|Byte|Word|Dword|Qword }
movabs, 0xa0, x64, D|W|CheckOperandSize|No_sSuf, { Disp64|Unspecified|Byte|Word|Dword|Qword, Acc|Byte|Word|Dword|Qword }
mov, 0x88, 0, D|W|CheckOperandSize|Modrm|No_sSuf|HLEPrefixRelease, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex }
// In the 64bit mode the short form mov immediate is redefined to have
@@ -623,6 +623,8 @@ ljmp, 0xea, No64, JumpInterSegment|No_bSuf|No_sSuf|No_qSuf, { Imm16, Imm16|Imm32
ljmp, 0xff/5, 0, Amd64|Modrm|JumpAbsolute|No_bSuf|No_sSuf|No_qSuf, { Unspecified|BaseIndex }
ljmp, 0xff/5, x64, Intel64|Modrm|JumpAbsolute|No_bSuf|No_sSuf, { Unspecified|BaseIndex }
+jmpabs, 0xa1, APX_F|x64, JumpAbsolute|NoSuf, { Imm64 }
+
ret, 0xc3, No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf|RepPrefixOk|BNDPrefixOk, {}
ret, 0xc2, No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf|RepPrefixOk|BNDPrefixOk, { Imm16 }
ret, 0xc3, x64, Amd64|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64|RepPrefixOk|BNDPrefixOk, {}