[22/27] sim: iq2000: invert sim_cpu storage
Commit Message
The cpu.h change is in generated cgen code, but that has been sent
upstream too, so the next regen should include it automatically.
---
sim/iq2000/cpu.h | 2 +-
sim/iq2000/sim-main.h | 13 ++++---------
2 files changed, 5 insertions(+), 10 deletions(-)
@@ -61,7 +61,7 @@ CPU (h_gr[(index)]) = (x);\
}\
;} while (0)
} hardware;
-#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware)
+#define CPU_CGEN_HW(cpu) (& IQ2000_SIM_CPU (cpu)->cpu_data.hardware)
} IQ2000BF_CPU_DATA;
/* Cover fns for register access. */
@@ -4,6 +4,8 @@
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
+#define SIM_HAVE_COMMON_SIM_CPU
+
/* This is a global setting. Different cpu families can't mix-n-match -scache
and -pbb. However some cpu families may use -simple while others use
one of -scache/-pbb. ???? */
@@ -22,15 +24,7 @@
#include "sim-base.h"
#include "cgen-sim.h"
-/* The _sim_cpu struct. */
-
-struct _sim_cpu {
- /* sim/common cpu base. */
- sim_cpu_base base;
-
- /* Static parts of cgen. */
- CGEN_CPU cgen_cpu;
-
+struct iq2000_sim_cpu {
/* CPU specific parts go here.
Note that in files that don't need to access these pieces WANT_CPU_FOO
won't be defined and thus these parts won't appear. This is ok in the
@@ -42,6 +36,7 @@ struct _sim_cpu {
IQ2000BF_CPU_DATA cpu_data;
#endif
};
+#define IQ2000_SIM_CPU(cpu) ((struct iq2000_sim_cpu *) CPU_ARCH_DATA (cpu))
/* Misc. */