diff mbox series

[24/27] sim: m32r: invert sim_cpu storage

Message ID 20221101151158.24916-25-vapier@gentoo.org
State Committed
Headers
Series sim: sim_cpu: invert sim_cpu storage |

Commit Message

Mike Frysinger Nov. 1, 2022, 3:11 p.m. UTC 
  The cpu*.h changes are in generated cgen code, but that has been sent
upstream too, so the next regen should include it automatically.
---
 sim/m32r/cpu.h      |  2 +-
 sim/m32r/cpu2.h     |  2 +-
 sim/m32r/cpux.h     |  2 +-
 sim/m32r/sim-main.h | 15 +++++----------
 4 files changed, 8 insertions(+), 13 deletions(-)
diff mbox series

Patch

diff --git a/sim/m32r/cpu.h b/sim/m32r/cpu.h
index 71a375f695ce..9079b74bb7d9 100644
--- a/sim/m32r/cpu.h
+++ b/sim/m32r/cpu.h
@@ -87,7 +87,7 @@  m32rbf_h_psw_set_handler (current_cpu, (x));\
 #define GET_H_LOCK() CPU (h_lock)
 #define SET_H_LOCK(x) (CPU (h_lock) = (x))
   } hardware;
-#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware)
+#define CPU_CGEN_HW(cpu) (& M32R_SIM_CPU (cpu)->cpu_data.hardware)
 } M32RBF_CPU_DATA;
 
 /* Cover fns for register access.  */
diff --git a/sim/m32r/cpu2.h b/sim/m32r/cpu2.h
index bd98a98a0c8d..5dc4d64db0cd 100644
--- a/sim/m32r/cpu2.h
+++ b/sim/m32r/cpu2.h
@@ -94,7 +94,7 @@  m32r2f_h_psw_set_handler (current_cpu, (x));\
 #define GET_H_LOCK() CPU (h_lock)
 #define SET_H_LOCK(x) (CPU (h_lock) = (x))
   } hardware;
-#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware)
+#define CPU_CGEN_HW(cpu) (& M32R_SIM_CPU (cpu)->cpu_data.hardware)
 } M32R2F_CPU_DATA;
 
 /* Cover fns for register access.  */
diff --git a/sim/m32r/cpux.h b/sim/m32r/cpux.h
index 1e6d84fc4685..f2496b075433 100644
--- a/sim/m32r/cpux.h
+++ b/sim/m32r/cpux.h
@@ -94,7 +94,7 @@  m32rxf_h_psw_set_handler (current_cpu, (x));\
 #define GET_H_LOCK() CPU (h_lock)
 #define SET_H_LOCK(x) (CPU (h_lock) = (x))
   } hardware;
-#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware)
+#define CPU_CGEN_HW(cpu) (& M32R_SIM_CPU (cpu)->cpu_data.hardware)
 } M32RXF_CPU_DATA;
 
 /* Cover fns for register access.  */
diff --git a/sim/m32r/sim-main.h b/sim/m32r/sim-main.h
index 2ce989a897a1..fcde7feb61cc 100644
--- a/sim/m32r/sim-main.h
+++ b/sim/m32r/sim-main.h
@@ -3,6 +3,8 @@ 
 #ifndef SIM_MAIN_H
 #define SIM_MAIN_H
 
+#define SIM_HAVE_COMMON_SIM_CPU
+
 /* This is a global setting.  Different cpu families can't mix-n-match -scache
    and -pbb.  However some cpu families may use -simple while others use
    one of -scache/-pbb.  */
@@ -19,17 +21,9 @@ 
 #include "m32r-sim.h"
 #include "opcode/cgen.h"
 
-/* The _sim_cpu struct.  */
-
-struct _sim_cpu {
-  /* sim/common cpu base.  */
-  sim_cpu_base base;
-
-  /* Static parts of cgen.  */
-  CGEN_CPU cgen_cpu;
-
+struct m32r_sim_cpu {
   M32R_MISC_PROFILE m32r_misc_profile;
-#define CPU_M32R_MISC_PROFILE(cpu) (& (cpu)->m32r_misc_profile)
+#define CPU_M32R_MISC_PROFILE(cpu) (& M32R_SIM_CPU (cpu)->m32r_misc_profile)
 
   /* CPU specific parts go here.
      Note that in files that don't need to access these pieces WANT_CPU_FOO
@@ -47,6 +41,7 @@  struct _sim_cpu {
   M32R2F_CPU_DATA cpu_data;
 #endif
 };
+#define M32R_SIM_CPU(cpu) ((struct m32r_sim_cpu *) CPU_ARCH_DATA (cpu))
 
 /* Misc.  */