[05/44] RISC-V: Fix `mode' usage in `riscv_expand_conditional_move'

Message ID alpine.DEB.2.20.2311171416130.5892@tpp.orcam.me.uk
State Committed
Commit 04c9c27c6f34a1ce1cd4900ccc8dc2521852e8e6
Delegated to: Kito Cheng
Headers
Series RISC-V: Various if-conversion fixes and improvements |

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Commit Message

Maciej W. Rozycki Nov. 19, 2023, 5:36 a.m. UTC
  In `riscv_expand_conditional_move' `mode' is initialized right away from 
`GET_MODE (dest)', so remove needless references that refrain from using 
the local variable.

	gcc/
	* config/riscv/riscv.cc (riscv_expand_conditional_move): Use 
	`mode' for `GET_MODE (dest)' throughout.
---
 gcc/config/riscv/riscv.cc |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

gcc-riscv-expand-conditional-move-mode-dest.diff
  

Comments

Kito Cheng Nov. 19, 2023, 5:54 a.m. UTC | #1
LGTM

On Sun, Nov 19, 2023 at 1:36 PM Maciej W. Rozycki <macro@embecosm.com> wrote:
>
> In `riscv_expand_conditional_move' `mode' is initialized right away from
> `GET_MODE (dest)', so remove needless references that refrain from using
> the local variable.
>
>         gcc/
>         * config/riscv/riscv.cc (riscv_expand_conditional_move): Use
>         `mode' for `GET_MODE (dest)' throughout.
> ---
>  gcc/config/riscv/riscv.cc |    4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> gcc-riscv-expand-conditional-move-mode-dest.diff
> Index: gcc/gcc/config/riscv/riscv.cc
> ===================================================================
> --- gcc.orig/gcc/config/riscv/riscv.cc
> +++ gcc/gcc/config/riscv/riscv.cc
> @@ -3999,8 +3999,8 @@ riscv_expand_conditional_move (rtx dest,
>          arm of the conditional move.  That allows us to support more
>          cases for extensions which are more general than SFB.  But
>          does mean we need to force CONS into a register at this point.  */
> -      cons = force_reg (GET_MODE (dest), cons);
> -      emit_insn (gen_rtx_SET (dest, gen_rtx_IF_THEN_ELSE (GET_MODE (dest),
> +      cons = force_reg (mode, cons);
> +      emit_insn (gen_rtx_SET (dest, gen_rtx_IF_THEN_ELSE (mode,
>                                                           cond, cons, alt)));
>        return true;
>      }
  

Patch

Index: gcc/gcc/config/riscv/riscv.cc
===================================================================
--- gcc.orig/gcc/config/riscv/riscv.cc
+++ gcc/gcc/config/riscv/riscv.cc
@@ -3999,8 +3999,8 @@  riscv_expand_conditional_move (rtx dest,
 	 arm of the conditional move.  That allows us to support more
 	 cases for extensions which are more general than SFB.  But
 	 does mean we need to force CONS into a register at this point.  */
-      cons = force_reg (GET_MODE (dest), cons);
-      emit_insn (gen_rtx_SET (dest, gen_rtx_IF_THEN_ELSE (GET_MODE (dest),
+      cons = force_reg (mode, cons);
+      emit_insn (gen_rtx_SET (dest, gen_rtx_IF_THEN_ELSE (mode,
 							  cond, cons, alt)));
       return true;
     }