[03/44] RISC-V: Reorder comment on SFB patterns
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Commit Message
Our `mov<mode>cc' expander is no longer specific to short forward branch
targets, so move its associated comment accordingly.
gcc/
* config/riscv/riscv.md (mov<mode>cc): Move comment on SFB
patterns over to...
(*mov<GPR:mode><X:mode>cc): ... here.
---
gcc/config/riscv/riscv.md | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
gcc-riscv-sfb-comment-move.diff
Comments
LGTM
On Sun, Nov 19, 2023 at 1:36 PM Maciej W. Rozycki <macro@embecosm.com> wrote:
>
> Our `mov<mode>cc' expander is no longer specific to short forward branch
> targets, so move its associated comment accordingly.
>
> gcc/
> * config/riscv/riscv.md (mov<mode>cc): Move comment on SFB
> patterns over to...
> (*mov<GPR:mode><X:mode>cc): ... here.
> ---
> gcc/config/riscv/riscv.md | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> gcc-riscv-sfb-comment-move.diff
> Index: gcc-master/gcc/config/riscv/riscv.md
> ===================================================================
> --- gcc-master.orig/gcc/config/riscv/riscv.md
> +++ gcc-master/gcc/config/riscv/riscv.md
> @@ -2655,8 +2655,6 @@
> [(set_attr "type" "branch")
> (set_attr "mode" "none")])
>
> -;; Patterns for implementations that optimize short forward branches.
> -
> (define_expand "mov<mode>cc"
> [(set (match_operand:GPR 0 "register_operand")
> (if_then_else:GPR (match_operand 1 "comparison_operator")
> @@ -2671,6 +2669,8 @@
> FAIL;
> })
>
> +;; Patterns for implementations that optimize short forward branches.
> +
> (define_insn "*mov<GPR:mode><X:mode>cc"
> [(set (match_operand:GPR 0 "register_operand" "=r,r")
> (if_then_else:GPR
===================================================================
@@ -2655,8 +2655,6 @@
[(set_attr "type" "branch")
(set_attr "mode" "none")])
-;; Patterns for implementations that optimize short forward branches.
-
(define_expand "mov<mode>cc"
[(set (match_operand:GPR 0 "register_operand")
(if_then_else:GPR (match_operand 1 "comparison_operator")
@@ -2671,6 +2669,8 @@
FAIL;
})
+;; Patterns for implementations that optimize short forward branches.
+
(define_insn "*mov<GPR:mode><X:mode>cc"
[(set (match_operand:GPR 0 "register_operand" "=r,r")
(if_then_else:GPR