| Message ID | 20230510133036.596530-16-christophe.lyon@arm.com |
|---|---|
| State | Committed |
| Commit | fa2c9dbb6ea474bcfc02bd6d92903397129b4e57 |
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To: <gcc-patches@gcc.gnu.org>, <kyrylo.tkachov@arm.com>,
<richard.earnshaw@arm.com>, <richard.sandiford@arm.com>
CC: Christophe Lyon <christophe.lyon@arm.com>
Subject: [PATCH 16/20] arm: [MVE intrinsics] factorize vaddlvq
Date: Wed, 10 May 2023 15:30:32 +0200
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| Series |
[01/20] arm: [MVE intrinsics] factorize vcmp
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Commit Message
Christophe Lyon
May 10, 2023, 1:30 p.m. UTC
Factorize vaddlvq builtins so that they use parameterized names. 2022-10-25 Christophe Lyon <christophe.lyon@arm.com> gcc/ * config/arm/iterators.md (mve_insn): Add vaddlv. * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ... (@mve_<mve_insn>q_<supf>v4si): ... this. (mve_vaddlvq_p_<supf>v4si): Rename into ... (@mve_<mve_insn>q_p_<supf>v4si): ... this. --- gcc/config/arm/iterators.md | 2 ++ gcc/config/arm/mve.md | 8 ++++---- 2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 00123c0a376..84dd97249f9 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -759,6 +759,8 @@ (define_int_attr mve_insn [ (VABDQ_S "vabd") (VABDQ_U "vabd") (VABDQ_F "vabd") (VABSQ_M_F "vabs") (VABSQ_M_S "vabs") + (VADDLVQ_P_S "vaddlv") (VADDLVQ_P_U "vaddlv") + (VADDLVQ_S "vaddlv") (VADDLVQ_U "vaddlv") (VADDQ_M_N_S "vadd") (VADDQ_M_N_U "vadd") (VADDQ_M_N_F "vadd") (VADDQ_M_S "vadd") (VADDQ_M_U "vadd") (VADDQ_M_F "vadd") (VADDQ_N_S "vadd") (VADDQ_N_U "vadd") (VADDQ_N_F "vadd") diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 1ccbce3c89c..c5373fef9a2 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -500,14 +500,14 @@ (define_insn "@mve_<mve_insn>q_<supf><mode>" ;; ;; [vaddlvq_s vaddlvq_u]) ;; -(define_insn "mve_vaddlvq_<supf>v4si" +(define_insn "@mve_<mve_insn>q_<supf>v4si" [ (set (match_operand:DI 0 "s_register_operand" "=r") (unspec:DI [(match_operand:V4SI 1 "s_register_operand" "w")] VADDLVQ)) ] "TARGET_HAVE_MVE" - "vaddlv.<supf>32\t%Q0, %R0, %q1" + "<mve_insn>.<supf>32\t%Q0, %R0, %q1" [(set_attr "type" "mve_move") ]) @@ -666,7 +666,7 @@ (define_insn "mve_vcvtq_n_from_f_<supf><mode>" ;; ;; [vaddlvq_p_s]) ;; -(define_insn "mve_vaddlvq_p_<supf>v4si" +(define_insn "@mve_<mve_insn>q_p_<supf>v4si" [ (set (match_operand:DI 0 "s_register_operand" "=r") (unspec:DI [(match_operand:V4SI 1 "s_register_operand" "w") @@ -674,7 +674,7 @@ (define_insn "mve_vaddlvq_p_<supf>v4si" VADDLVQ_P)) ] "TARGET_HAVE_MVE" - "vpst\;vaddlvt.<supf>32\t%Q0, %R0, %q1" + "vpst\;<mve_insn>t.<supf>32\t%Q0, %R0, %q1" [(set_attr "type" "mve_move") (set_attr "length""8")])