diff mbox series

[3/3,ARM] STAR-MC1 CPU Support - docs: Add star-mc1 core

Message ID 32d83c13-a219-2320-f6b0-550489b6983f@gmail.com
State Committed
Headers
Series [1/3,ARM] STAR-MC1 CPU Support - arm: Add star-mc1 core |

Commit Message

Chung-Ju Wu May 26, 2022, 7:19 a.m. UTC 
  Hi,

This is the patch to add star-mc1 in the Arm -mtune and
-mfix-cmse-cve-2021-35465 sections of gcc invoke.texi documentation.

Is it OK for trunk?

Regards,
jasonwucj
From b3bd24d842b6284f2b893caa658975d9d746be73 Mon Sep 17 00:00:00 2001
From: Chung-Ju Wu <jasonwucj@gmail.com>
Date: Thu, 26 May 2022 05:15:13 +0000
Subject: [PATCH 3/3] docs: Add star-mc1 core

Signed-off-by: Chung-Ju Wu <jasonwucj@gmail.com>

gcc/ChangeLog:

	* doc/invoke.text: Add star-mc1 core.
---
 gcc/doc/invoke.texi | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

Comments

Kyrylo Tkachov June 6, 2022, 2:07 p.m. UTC | #1 
Hi jasonwucj,

> -----Original Message-----
> From: Gcc-patches <gcc-patches-
> bounces+kyrylo.tkachov=arm.com@gcc.gnu.org> On Behalf Of Chung-Ju Wu
> via Gcc-patches
> Sent: Thursday, May 26, 2022 8:19 AM
> To: Richard Earnshaw <Richard.Earnshaw@arm.com>; gcc-patches <gcc-
> patches@gcc.gnu.org>
> Cc: Jason.Wu@anshingtek.com.tw
> Subject: [PATCH 3/3][ARM] STAR-MC1 CPU Support - docs: Add star-mc1 core
> 
> Hi,
> 
> This is the patch to add star-mc1 in the Arm -mtune and
> -mfix-cmse-cve-2021-35465 sections of gcc invoke.texi documentation.
> 
> Is it OK for trunk?

This is okay but I'd rather have it merged with patch 1/3 (I'll review that separately).
There's no reason to keep such a simple documentation addition separate from the patch that actually adds the feature being documented.
Thanks,
Kyrill

> 
> Regards,
> jasonwucj
diff mbox series

Patch

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 71098d86313..ac889e6e2b4 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -21181,7 +21181,8 @@  Permissible names are: @samp{arm7tdmi}, @samp{arm7tdmi-s}, @samp{arm710t},
 @samp{cortex-m0plus.small-multiply}, @samp{exynos-m1}, @samp{marvell-pj4},
 @samp{neoverse-n1}, @samp{neoverse-n2}, @samp{neoverse-v1}, @samp{xscale},
 @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}, @samp{fa526}, @samp{fa626},
-@samp{fa606te}, @samp{fa626te}, @samp{fmp626}, @samp{fa726te}, @samp{xgene1}.
+@samp{fa606te}, @samp{fa626te}, @samp{fmp626}, @samp{fa726te}, @samp{star-mc1},
+@samp{xgene1}.
 
 Additionally, this option can specify that GCC should tune the performance
 of the code for a big.LITTLE system.  Permissible names are:
@@ -21587,8 +21588,9 @@  Development Tools Engineering Specification", which can be found on
 Mitigate against a potential security issue with the @code{VLLDM} instruction
 in some M-profile devices when using CMSE (CVE-2021-365465).  This option is
 enabled by default when the option @option{-mcpu=} is used with
-@code{cortex-m33}, @code{cortex-m35p} or @code{cortex-m55}.  The option
-@option{-mno-fix-cmse-cve-2021-35465} can be used to disable the mitigation.
+@code{cortex-m33}, @code{cortex-m35p}, @code{cortex-m55} or @code{star-mc1}.
+The option @option{-mno-fix-cmse-cve-2021-35465} can be used to disable
+the mitigation.
 
 @item -mstack-protector-guard=@var{guard}
 @itemx -mstack-protector-guard-offset=@var{offset}