diff mbox series

[13/17] sim: mn10300: fix -Wunused-but-set-variable warnings

Message ID 20231207035937.14920-13-vapier@gentoo.org
State New
Headers
Series [01/17] sim: arm: fix -Wunused-but-set-variable warnings |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_gdb_build--master-aarch64 fail Patch failed to apply
linaro-tcwg-bot/tcwg_gdb_build--master-arm fail Patch failed to apply

Commit Message

Mike Frysinger Dec. 7, 2023, 3:59 a.m. UTC 
  ---
 sim/mn10300/am33.igen | 15 +++++----------
 1 file changed, 5 insertions(+), 10 deletions(-)
diff mbox series

Patch

diff --git a/sim/mn10300/am33.igen b/sim/mn10300/am33.igen
index da8f88fa599f..60c77d47fe33 100644
--- a/sim/mn10300/am33.igen
+++ b/sim/mn10300/am33.igen
@@ -2688,7 +2688,7 @@ 
 *am33
 *am33_2
 {
-  int z, c, n;
+  int z, n;
   int32_t temp;
   int srcreg1, srcreg2, dstreg;
 
@@ -2698,7 +2698,6 @@ 
   dstreg = translate_rreg (SD_, RD0);
 
   temp = State.regs[srcreg2];
-  c = temp & 1;
   temp >>= State.regs[srcreg1];
   State.regs[dstreg] = temp;
 
@@ -2715,7 +2714,7 @@ 
 *am33
 *am33_2
 {
-  int z, c, n;
+  int z, n;
   int srcreg1, srcreg2, dstreg;
 
   PC = cia;
@@ -2723,7 +2722,6 @@ 
   srcreg2 = translate_rreg (SD_, RN0);
   dstreg = translate_rreg (SD_, RD0);
 
-  c = State.regs[srcreg2] & 1;
   State.regs[dstreg] = State.regs[srcreg2] >> State.regs[srcreg1];
 
   z = (State.regs[dstreg] == 0);
@@ -3242,12 +3240,11 @@ 
 *am33
 *am33_2
 {
-  int srcreg1, srcreg2, dstreg1, dstreg2;
+  int srcreg1, dstreg1, dstreg2;
   int64_t temp;
 
   PC = cia;
   srcreg1 = translate_rreg (SD_, RM2);
-  srcreg2 = translate_rreg (SD_, RN0);
   dstreg1 = translate_rreg (SD_, RD0);
   dstreg2 = translate_rreg (SD_, RD2);
 
@@ -3265,12 +3262,11 @@ 
 *am33
 *am33_2
 {
-  int srcreg1, srcreg2, dstreg1, dstreg2;
+  int srcreg1, dstreg1, dstreg2;
   int64_t temp;
 
   PC = cia;
   srcreg1 = translate_rreg (SD_, RM2);
-  srcreg2 = translate_rreg (SD_, RN0);
   dstreg1 = translate_rreg (SD_, RD0);
   dstreg2 = translate_rreg (SD_, RD2);
 
@@ -8638,11 +8634,10 @@ 
 *am33
 *am33_2
 {
-  int srcreg1, srcreg2, dstreg1, dstreg2;
+  int srcreg1, dstreg1, dstreg2;
 
   PC = cia;
   srcreg1 = translate_rreg (SD_, RM1);
-  srcreg2 = translate_rreg (SD_, RM2);
   dstreg1 = translate_rreg (SD_, RN1);
   dstreg2 = translate_rreg (SD_, RN2);