[v6,1/2] sim: riscv: Fix crash during instruction decoding

Message ID 20240111052822.1576345-2-jaydeep.patil@imgtec.com
State New
Headers
Series sim: riscv: Compressed instruction simulation |

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Commit Message

Jaydeep Patil Jan. 11, 2024, 5:28 a.m. UTC
  From: Jaydeep Patil <jaydeep.patil@imgtec.com>

The match_never() function has been removed and thus step_once() crashes
during instruction decoding. Fixed it by checking for null pointer before
invoking function attached to match_func member of riscv_opcode structure
---
 sim/riscv/sim-main.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
  

Comments

Andrew Burgess Jan. 22, 2024, 10:18 a.m. UTC | #1
<jaydeep.patil@imgtec.com> writes:

> From: Jaydeep Patil <jaydeep.patil@imgtec.com>
>
> The match_never() function has been removed and thus step_once() crashes
> during instruction decoding. Fixed it by checking for null pointer before
> invoking function attached to match_func member of riscv_opcode structure
> ---
>  sim/riscv/sim-main.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Thank you for continuing to work on these patches.

For patch 1/2:

Approved-By: Andrew Burgess <aburgess@redhat.com>

Thanks,
Andrew

>
> diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c
> index b04d12c0de1..25dc9b41412 100644
> --- a/sim/riscv/sim-main.c
> +++ b/sim/riscv/sim-main.c
> @@ -1040,7 +1040,7 @@ void step_once (SIM_CPU *cpu)
>    for (; op->name; op++)
>      {
>        /* Does the opcode match?  */
> -      if (! op->match_func (op, iw))
> +      if (! op->match_func || ! op->match_func (op, iw))
>  	continue;
>        /* Is this a pseudo-instruction and may we print it as such?  */
>        if (op->pinfo & INSN_ALIAS)
> -- 
> 2.25.1
  
Mike Frysinger Jan. 23, 2024, 1:18 a.m. UTC | #2
On 11 Jan 2024 05:28, jaydeep.patil@imgtec.com wrote:
> The match_never() function has been removed and thus step_once() crashes
> during instruction decoding. Fixed it by checking for null pointer before
> invoking function attached to match_func member of riscv_opcode structure

pushed now, thx
-mike
  

Patch

diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c
index b04d12c0de1..25dc9b41412 100644
--- a/sim/riscv/sim-main.c
+++ b/sim/riscv/sim-main.c
@@ -1040,7 +1040,7 @@  void step_once (SIM_CPU *cpu)
   for (; op->name; op++)
     {
       /* Does the opcode match?  */
-      if (! op->match_func (op, iw))
+      if (! op->match_func || ! op->match_func (op, iw))
 	continue;
       /* Is this a pseudo-instruction and may we print it as such?  */
       if (op->pinfo & INSN_ALIAS)