diff mbox series

rs6000: Rename vec_clrl and vec_clrr to agreed-upon names

Message ID 6b18b3aa-441f-22f5-7b1d-6bb962cd55f0@linux.ibm.com
State New
Headers
Series rs6000: Rename vec_clrl and vec_clrr to agreed-upon names |

Commit Message

Li, Pan2 via Gcc-patches Feb. 9, 2022, 8:51 p.m. UTC 
  Hi!

After vec_clrl and vec_clrr were implemented and during review of the
documentation, it was agreed to change their names to vec_clr_first and
vec_clr_last to more clearly describe their bi-endian semantics.  ("Left"
and "right" are the wrong terms to be using.)  It looks like I neglected
to make that change, so fixing it now.

Bootstrapped and tested on powerpc64le-linux-gnu with no regressions.
Is this okay for trunk, and for backport to gcc 11 after some burn-in?

Thanks!
Bill


2022-02-09  Bill Schmidt  <wschmidt@linux.ibm.com>

gcc/
	* config/rs6000/rs6000-overload.def (VEC_CLR_FIRST): Rename from
	VEC_CLRL.
	(VEC_CLR_LAST): Rename from VEC_CLRR.

gcc/testsuite/
	* gcc.target/powerpc/vec-clrl-0.c: Adjust to new names.
	* gcc.target/powerpc/vec-clrl-1.c: Likewise.
	* gcc.target/powerpc/vec-clrl-2.c: Likewise.
	* gcc.target/powerpc/vec-clrl-3.c: Likewise.
	* gcc.target/powerpc/vec-clrr-0.c: Likewise.
	* gcc.target/powerpc/vec-clrr-1.c: Likewise.
	* gcc.target/powerpc/vec-clrr-2.c: Likewise.
	* gcc.target/powerpc/vec-clrr-3.c: Likewise.
---
 gcc/config/rs6000/rs6000-overload.def         | 12 ++++++------
 gcc/testsuite/gcc.target/powerpc/vec-clrl-0.c |  4 ++--
 gcc/testsuite/gcc.target/powerpc/vec-clrl-1.c |  4 ++--
 gcc/testsuite/gcc.target/powerpc/vec-clrl-2.c |  4 ++--
 gcc/testsuite/gcc.target/powerpc/vec-clrl-3.c |  4 ++--
 gcc/testsuite/gcc.target/powerpc/vec-clrr-0.c |  4 ++--
 gcc/testsuite/gcc.target/powerpc/vec-clrr-1.c |  4 ++--
 gcc/testsuite/gcc.target/powerpc/vec-clrr-2.c |  4 ++--
 gcc/testsuite/gcc.target/powerpc/vec-clrr-3.c |  4 ++--
 9 files changed, 22 insertions(+), 22 deletions(-)
diff mbox series

Patch

diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def
index 44e2945aaa0..0b68cc3c3b2 100644
--- a/gcc/config/rs6000/rs6000-overload.def
+++ b/gcc/config/rs6000/rs6000-overload.def
@@ -557,16 +557,16 @@ 
   vuc __builtin_vec_vcipherlast_be (vuc, vuc);
     VCIPHERLAST_BE
 
-[VEC_CLRL, vec_clrl, __builtin_vec_clrl]
-  vsc __builtin_vec_clrl (vsc, unsigned int);
+[VEC_CLR_FIRST, vec_clr_first, __builtin_vec_clr_first]
+  vsc __builtin_vec_clr_first (vsc, unsigned int);
     VCLRLB  VCLRLB_S
-  vuc __builtin_vec_clrl (vuc, unsigned int);
+  vuc __builtin_vec_clr_first (vuc, unsigned int);
     VCLRLB  VCLRLB_U
 
-[VEC_CLRR, vec_clrr, __builtin_vec_clrr]
-  vsc __builtin_vec_clrr (vsc, unsigned int);
+[VEC_CLR_LAST, vec_clr_last, __builtin_vec_clr_last]
+  vsc __builtin_vec_clr_last (vsc, unsigned int);
     VCLRRB  VCLRRB_S
-  vuc __builtin_vec_clrr (vuc, unsigned int);
+  vuc __builtin_vec_clr_last (vuc, unsigned int);
     VCLRRB  VCLRRB_U
 
 ; We skip generating a #define because of the C-versus-C++ complexity
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-clrl-0.c b/gcc/testsuite/gcc.target/powerpc/vec-clrl-0.c
index d0b183ebfaf..df055c6535e 100644
--- a/gcc/testsuite/gcc.target/powerpc/vec-clrl-0.c
+++ b/gcc/testsuite/gcc.target/powerpc/vec-clrl-0.c
@@ -5,11 +5,11 @@ 
 
 extern void abort (void);
 
-/* Vector string clear left-most bytes of unsigned char.  */
+/* Vector string clear first bytes of unsigned char.  */
 vector unsigned char
 clrl (vector unsigned char arg, int n)
 {
-  return vec_clrl (arg, n);
+  return vec_clr_first (arg, n);
 }
 
 /* { dg-final { scan-assembler {\mvclrlb\M} { target be } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-clrl-1.c b/gcc/testsuite/gcc.target/powerpc/vec-clrl-1.c
index 43ab32c0278..692f83e033b 100644
--- a/gcc/testsuite/gcc.target/powerpc/vec-clrl-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/vec-clrl-1.c
@@ -7,11 +7,11 @@ 
 
 extern void abort (void);
 
-/* Vector string clear left-most bytes of unsigned char.  */
+/* Vector string clear first bytes of unsigned char.  */
 vector unsigned char
 clrl (vector unsigned char arg, int n)
 {
-  return vec_clrl (arg, n);
+  return vec_clr_first (arg, n);
 }
 
 int main (int argc, char *argv [])
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-clrl-2.c b/gcc/testsuite/gcc.target/powerpc/vec-clrl-2.c
index b9676b8b04c..ffecf432736 100644
--- a/gcc/testsuite/gcc.target/powerpc/vec-clrl-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/vec-clrl-2.c
@@ -5,11 +5,11 @@ 
 
 extern void abort (void);
 
-/* Vector string clear left-most bytes of unsigned char.  */
+/* Vector string clear first bytes of unsigned char.  */
 vector signed char
 clrl (vector signed char arg, int n)
 {
-  return vec_clrl (arg, n);
+  return vec_clr_first (arg, n);
 }
 
 /* { dg-final { scan-assembler {\mvclrlb\M} { target be } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-clrl-3.c b/gcc/testsuite/gcc.target/powerpc/vec-clrl-3.c
index 0ae5abcee50..456f655e7aa 100644
--- a/gcc/testsuite/gcc.target/powerpc/vec-clrl-3.c
+++ b/gcc/testsuite/gcc.target/powerpc/vec-clrl-3.c
@@ -7,11 +7,11 @@ 
 
 extern void abort (void);
 
-/* Vector string clear left-most bytes of unsigned char.  */
+/* Vector string clear first bytes of unsigned char.  */
 vector signed char
 clrl (vector signed char arg, int n)
 {
-  return vec_clrl (arg, n);
+  return vec_clr_first (arg, n);
 }
 
 int main (int argc, char *argv [])
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-clrr-0.c b/gcc/testsuite/gcc.target/powerpc/vec-clrr-0.c
index 2aa1454d140..5cd10fa900c 100644
--- a/gcc/testsuite/gcc.target/powerpc/vec-clrr-0.c
+++ b/gcc/testsuite/gcc.target/powerpc/vec-clrr-0.c
@@ -5,11 +5,11 @@ 
 
 extern void abort (void);
 
-/* Vector string clear right-most bytes of unsigned char.  */
+/* Vector string clear last bytes of unsigned char.  */
 vector unsigned char
 clrr (vector unsigned char arg, int n)
 {
-  return vec_clrr (arg, n);
+  return vec_clr_last (arg, n);
 }
 
 /* { dg-final { scan-assembler {\mvclrrb\M} { target be } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-clrr-1.c b/gcc/testsuite/gcc.target/powerpc/vec-clrr-1.c
index c72ae86cd32..b261ec84dc6 100644
--- a/gcc/testsuite/gcc.target/powerpc/vec-clrr-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/vec-clrr-1.c
@@ -7,11 +7,11 @@ 
 
 extern void abort (void);
 
-/* Vector string clear right-most bytes of unsigned char.  */
+/* Vector string clear last bytes of unsigned char.  */
 vector unsigned char
 clrr (vector unsigned char arg, int n)
 {
-  return vec_clrr (arg, n);
+  return vec_clr_last (arg, n);
 }
 
 int main (int argc, char *argv [])
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-clrr-2.c b/gcc/testsuite/gcc.target/powerpc/vec-clrr-2.c
index f09be49e0ab..0b7f096f95f 100644
--- a/gcc/testsuite/gcc.target/powerpc/vec-clrr-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/vec-clrr-2.c
@@ -5,11 +5,11 @@ 
 
 extern void abort (void);
 
-/* Vector string clear right-most bytes of unsigned char.  */
+/* Vector string clear last bytes of unsigned char.  */
 vector signed char
 clrr (vector signed char arg, int n)
 {
-  return vec_clrr (arg, n);
+  return vec_clr_last (arg, n);
 }
 
 /* { dg-final { scan-assembler {\mvclrrb\M} { target be } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-clrr-3.c b/gcc/testsuite/gcc.target/powerpc/vec-clrr-3.c
index 1413c11b872..66297245374 100644
--- a/gcc/testsuite/gcc.target/powerpc/vec-clrr-3.c
+++ b/gcc/testsuite/gcc.target/powerpc/vec-clrr-3.c
@@ -7,11 +7,11 @@ 
 
 extern void abort (void);
 
-/* Vector string clear right-most bytes of unsigned char.  */
+/* Vector string clear last bytes of unsigned char.  */
 vector signed char
 clrr (vector signed char arg, int n)
 {
-  return vec_clrr (arg, n);
+  return vec_clr_last (arg, n);
 }
 
 int main (int argc, char *argv [])