diff mbox series

arm: Restrict support of vectors of boolean immediates (PR target/104662)

Message ID 20220420085003.55338-1-christophe.lyon@arm.com
State Committed
Commit e2285af309000b74da0f7dc756a0b55e5f0b1b56
Headers
Series arm: Restrict support of vectors of boolean immediates (PR target/104662) |

Commit Message

Christophe Lyon April 20, 2022, 8:50 a.m. UTC 
  This simple patch avoids the ICE described in the PR:
internal compiler error: in simd_valid_immediate, at config/arm/arm.cc:12866

with an early exit from simd_valid_immediate if we are trying to
handle a vector of booleans and MVE is not enabled.

We still get an ICE when compiling the existing
gcc.dg/rtl/arm/mve-vxbi.c without -march=armv8.1-m.main+mve:

error: unrecognizable insn:
(insn 7 5 8 2 (set (reg:V4BI 114)
        (const_vector:V4BI [
                (const_int 1 [0x1])
                (const_int 0 [0]) repeated x2
                (const_int 1 [0x1])
            ])) -1
     (nil))
during RTL pass: ira

but there's little we can do since the testcase explicitly creates
vectors of booleans which do need MVE.

That is the reason why I do not add a testcase.

2022-04-19  Christophe Lyon  <christophe.lyon@arm.com>

	PR target/104662
	* config/arm/arm.cc (simd_valid_immediate): Exit when input is a
	vector of booleans and MVE is not enabled.
---
 gcc/config/arm/arm.cc | 3 +++
 1 file changed, 3 insertions(+)

Comments

Christophe Lyon May 4, 2022, 7:50 a.m. UTC | #1 
ping?

On 4/20/22 10:50, Christophe Lyon wrote:
> This simple patch avoids the ICE described in the PR:
> internal compiler error: in simd_valid_immediate, at config/arm/arm.cc:12866
> 
> with an early exit from simd_valid_immediate if we are trying to
> handle a vector of booleans and MVE is not enabled.
> 
> We still get an ICE when compiling the existing
> gcc.dg/rtl/arm/mve-vxbi.c without -march=armv8.1-m.main+mve:
> 
> error: unrecognizable insn:
> (insn 7 5 8 2 (set (reg:V4BI 114)
>          (const_vector:V4BI [
>                  (const_int 1 [0x1])
>                  (const_int 0 [0]) repeated x2
>                  (const_int 1 [0x1])
>              ])) -1
>       (nil))
> during RTL pass: ira
> 
> but there's little we can do since the testcase explicitly creates
> vectors of booleans which do need MVE.
> 
> That is the reason why I do not add a testcase.
> 
> 2022-04-19  Christophe Lyon  <christophe.lyon@arm.com>
> 
> 	PR target/104662
> 	* config/arm/arm.cc (simd_valid_immediate): Exit when input is a
> 	vector of booleans and MVE is not enabled.
> ---
>   gcc/config/arm/arm.cc | 3 +++
>   1 file changed, 3 insertions(+)
> 
> diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc
> index 14e2fdfeafa..69a18c2f157 100644
> --- a/gcc/config/arm/arm.cc
> +++ b/gcc/config/arm/arm.cc
> @@ -12849,6 +12849,9 @@ simd_valid_immediate (rtx op, machine_mode mode, int inverse,
>   	  || n_elts * innersize != 16))
>       return -1;
>   
> +  if (!TARGET_HAVE_MVE && GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL)
> +    return -1;
> +
>     /* Vectors of float constants.  */
>     if (GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
>       {
Kyrylo Tkachov May 4, 2022, 8:03 a.m. UTC | #2 
> -----Original Message-----
> From: Gcc-patches <gcc-patches-
> bounces+kyrylo.tkachov=arm.com@gcc.gnu.org> On Behalf Of Christophe
> Lyon via Gcc-patches
> Sent: Wednesday, May 4, 2022 8:51 AM
> To: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH] arm: Restrict support of vectors of boolean immediates
> (PR target/104662)
> 
> ping?
> 
> On 4/20/22 10:50, Christophe Lyon wrote:
> > This simple patch avoids the ICE described in the PR:
> > internal compiler error: in simd_valid_immediate, at
> config/arm/arm.cc:12866
> >
> > with an early exit from simd_valid_immediate if we are trying to
> > handle a vector of booleans and MVE is not enabled.
> >
> > We still get an ICE when compiling the existing
> > gcc.dg/rtl/arm/mve-vxbi.c without -march=armv8.1-m.main+mve:
> >
> > error: unrecognizable insn:
> > (insn 7 5 8 2 (set (reg:V4BI 114)
> >          (const_vector:V4BI [
> >                  (const_int 1 [0x1])
> >                  (const_int 0 [0]) repeated x2
> >                  (const_int 1 [0x1])
> >              ])) -1
> >       (nil))
> > during RTL pass: ira
> >
> > but there's little we can do since the testcase explicitly creates
> > vectors of booleans which do need MVE.
> >
> > That is the reason why I do not add a testcase.

Ok if testing is fine.
Thanks,
Kyrill

> >
> > 2022-04-19  Christophe Lyon  <christophe.lyon@arm.com>
> >
> > 	PR target/104662
> > 	* config/arm/arm.cc (simd_valid_immediate): Exit when input is a
> > 	vector of booleans and MVE is not enabled.
> > ---
> >   gcc/config/arm/arm.cc | 3 +++
> >   1 file changed, 3 insertions(+)
> >
> > diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc
> > index 14e2fdfeafa..69a18c2f157 100644
> > --- a/gcc/config/arm/arm.cc
> > +++ b/gcc/config/arm/arm.cc
> > @@ -12849,6 +12849,9 @@ simd_valid_immediate (rtx op, machine_mode
> mode, int inverse,
> >   	  || n_elts * innersize != 16))
> >       return -1;
> >
> > +  if (!TARGET_HAVE_MVE && GET_MODE_CLASS (mode) ==
> MODE_VECTOR_BOOL)
> > +    return -1;
> > +
> >     /* Vectors of float constants.  */
> >     if (GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
> >       {
Christophe Lyon May 4, 2022, 8:22 a.m. UTC | #3 
On 5/4/22 10:03, Kyrylo Tkachov wrote:
> 
> 
>> -----Original Message-----
>> From: Gcc-patches <gcc-patches-
>> bounces+kyrylo.tkachov=arm.com@gcc.gnu.org> On Behalf Of Christophe
>> Lyon via Gcc-patches
>> Sent: Wednesday, May 4, 2022 8:51 AM
>> To: gcc-patches@gcc.gnu.org
>> Subject: Re: [PATCH] arm: Restrict support of vectors of boolean immediates
>> (PR target/104662)
>>
>> ping?
>>
>> On 4/20/22 10:50, Christophe Lyon wrote:
>>> This simple patch avoids the ICE described in the PR:
>>> internal compiler error: in simd_valid_immediate, at
>> config/arm/arm.cc:12866
>>>
>>> with an early exit from simd_valid_immediate if we are trying to
>>> handle a vector of booleans and MVE is not enabled.
>>>
>>> We still get an ICE when compiling the existing
>>> gcc.dg/rtl/arm/mve-vxbi.c without -march=armv8.1-m.main+mve:
>>>
>>> error: unrecognizable insn:
>>> (insn 7 5 8 2 (set (reg:V4BI 114)
>>>           (const_vector:V4BI [
>>>                   (const_int 1 [0x1])
>>>                   (const_int 0 [0]) repeated x2
>>>                   (const_int 1 [0x1])
>>>               ])) -1
>>>        (nil))
>>> during RTL pass: ira
>>>
>>> but there's little we can do since the testcase explicitly creates
>>> vectors of booleans which do need MVE.
>>>
>>> That is the reason why I do not add a testcase.
> 
> Ok if testing is fine.

Thanks, pushed as r13-102-ge2285af309000b

Christophe

> Thanks,
> Kyrill
> 
>>>
>>> 2022-04-19  Christophe Lyon  <christophe.lyon@arm.com>
>>>
>>> 	PR target/104662
>>> 	* config/arm/arm.cc (simd_valid_immediate): Exit when input is a
>>> 	vector of booleans and MVE is not enabled.
>>> ---
>>>    gcc/config/arm/arm.cc | 3 +++
>>>    1 file changed, 3 insertions(+)
>>>
>>> diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc
>>> index 14e2fdfeafa..69a18c2f157 100644
>>> --- a/gcc/config/arm/arm.cc
>>> +++ b/gcc/config/arm/arm.cc
>>> @@ -12849,6 +12849,9 @@ simd_valid_immediate (rtx op, machine_mode
>> mode, int inverse,
>>>    	  || n_elts * innersize != 16))
>>>        return -1;
>>>
>>> +  if (!TARGET_HAVE_MVE && GET_MODE_CLASS (mode) ==
>> MODE_VECTOR_BOOL)
>>> +    return -1;
>>> +
>>>      /* Vectors of float constants.  */
>>>      if (GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
>>>        {
diff mbox series

Patch

diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc
index 14e2fdfeafa..69a18c2f157 100644
--- a/gcc/config/arm/arm.cc
+++ b/gcc/config/arm/arm.cc
@@ -12849,6 +12849,9 @@  simd_valid_immediate (rtx op, machine_mode mode, int inverse,
 	  || n_elts * innersize != 16))
     return -1;
 
+  if (!TARGET_HAVE_MVE && GET_MODE_CLASS (mode) == MODE_VECTOR_BOOL)
+    return -1;
+
   /* Vectors of float constants.  */
   if (GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
     {