[v2,05/14] arm: Add support for VPR_REG in arm_class_likely_spilled_p

Message ID 20211013101554.2732342-6-christophe.lyon@foss.st.com
State Superseded
Series ARM/MVE use vectors of boolean for predicates |

Commit Message

Christophe Lyon Oct. 13, 2021, 10:15 a.m. UTC
  VPR_REG is the only register in its class, so it should be handled by
TARGET_CLASS_LIKELY_SPILLED_P, which is achieved by calling
default_class_likely_spilled_p.  No test fails without this patch, but
it seems it should be implemented.

2021-10-13  Christophe Lyon  <christophe.lyon@foss.st.com>

	* config/arm/arm.c (arm_class_likely_spilled_p): Handle VPR_REG.


diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 11dafc70067..9f52a152444 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -29307,7 +29307,7 @@  arm_class_likely_spilled_p (reg_class_t rclass)
       || rclass  == CC_REG)
     return true;
-  return false;
+  return default_class_likely_spilled_p (rclass);
 /* Implements target hook small_register_classes_for_mode_p.  */