diff mbox series

Replace a HWI_COMPUTABLE_MODE_P with wide-int in simplify-rtx.cc.

Message ID 021601d99002$02fe60e0$08fb22a0$@nextmovesoftware.com
State Committed
Commit 2a941f9f824b64ea8b42c885746fbc5f5321589d
Headers
Series Replace a HWI_COMPUTABLE_MODE_P with wide-int in simplify-rtx.cc. |

Commit Message

Roger Sayle May 26, 2023, 6:43 p.m. UTC 
  This patch enhances one of the optimizations in simplify_binary_operation_1
to allow it to simplify RTL expressions in modes than HOST_WIDE_INT by
replacing a use of HWI_COMPUTABLE_MODE_P and UINTVAL with wide_int.

The motivating example is a pending x86_64 backend patch that produces
the following RTL in combine:

(and:TI (zero_extend:TI (reg:DI 89))
        (const_wide_int 0x0ffffffffffffffff))

where the AND is redundant, as the mask, ~0LL, is DImode's MODE_MASK.
There's already an optimization that catches this for narrower modes,
transforming (and:HI (zero_extend:HI (reg:QI x)) (const_int 0xff))
into (zero_extend:HI (reg:QI x)), but this currently only handles
CONST_INT not CONST_WIDE_INT.  Fixed by upgrading this transformation
to use wide_int, specifically rtx_mode_t and wi::mask.

This patch has been tested on x86_64-pc-linux-gnu with make bootstrap
and make -k check, both with and without --target_board=unix{-m32}
with no new failures.  Ok for mainline?


2023-05-23  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
	* simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
	instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
	(and (extend X) C) as (zero_extend (and X C)), to also optimize
	modes wider than HOST_WIDE_INT.


Thanks in advance,
Roger
--

Comments

Richard Biener May 30, 2023, 6:31 a.m. UTC | #1 
On Fri, May 26, 2023 at 8:44 PM Roger Sayle <roger@nextmovesoftware.com> wrote:
>
>
> This patch enhances one of the optimizations in simplify_binary_operation_1
> to allow it to simplify RTL expressions in modes than HOST_WIDE_INT by
> replacing a use of HWI_COMPUTABLE_MODE_P and UINTVAL with wide_int.
>
> The motivating example is a pending x86_64 backend patch that produces
> the following RTL in combine:
>
> (and:TI (zero_extend:TI (reg:DI 89))
>         (const_wide_int 0x0ffffffffffffffff))
>
> where the AND is redundant, as the mask, ~0LL, is DImode's MODE_MASK.
> There's already an optimization that catches this for narrower modes,
> transforming (and:HI (zero_extend:HI (reg:QI x)) (const_int 0xff))
> into (zero_extend:HI (reg:QI x)), but this currently only handles
> CONST_INT not CONST_WIDE_INT.  Fixed by upgrading this transformation
> to use wide_int, specifically rtx_mode_t and wi::mask.
>
> This patch has been tested on x86_64-pc-linux-gnu with make bootstrap
> and make -k check, both with and without --target_board=unix{-m32}
> with no new failures.  Ok for mainline?

OK.

Thanks,
Richard.

>
> 2023-05-23  Roger Sayle  <roger@nextmovesoftware.com>
>
> gcc/ChangeLog
>         * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
>         instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
>         (and (extend X) C) as (zero_extend (and X C)), to also optimize
>         modes wider than HOST_WIDE_INT.
>
>
> Thanks in advance,
> Roger
> --
>
diff mbox series

Patch

diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
index d4aeebc..8dc880b 100644
--- a/gcc/simplify-rtx.cc
+++ b/gcc/simplify-rtx.cc
@@ -3826,15 +3826,16 @@  simplify_context::simplify_binary_operation_1 (rtx_code code,
 	 there are no nonzero bits of C outside of X's mode.  */
       if ((GET_CODE (op0) == SIGN_EXTEND
 	   || GET_CODE (op0) == ZERO_EXTEND)
-	  && CONST_INT_P (trueop1)
-	  && HWI_COMPUTABLE_MODE_P (mode)
-	  && (~GET_MODE_MASK (GET_MODE (XEXP (op0, 0)))
-	      & UINTVAL (trueop1)) == 0)
+	  && CONST_SCALAR_INT_P (trueop1)
+	  && is_a <scalar_int_mode> (mode, &int_mode)
+	  && is_a <scalar_int_mode> (GET_MODE (XEXP (op0, 0)), &inner_mode)
+	  && (wi::mask (GET_MODE_PRECISION (inner_mode), true,
+			GET_MODE_PRECISION (int_mode))
+	      & rtx_mode_t (trueop1, mode)) == 0)
 	{
 	  machine_mode imode = GET_MODE (XEXP (op0, 0));
-	  tem = simplify_gen_binary (AND, imode, XEXP (op0, 0),
-				     gen_int_mode (INTVAL (trueop1),
-						   imode));
+	  tem = immed_wide_int_const (rtx_mode_t (trueop1, mode), imode);
+	  tem = simplify_gen_binary (AND, imode, XEXP (op0, 0), tem);
 	  return simplify_gen_unary (ZERO_EXTEND, mode, tem, imode);
 	}