Show patches with: Submitter = Roger Sayle       |    State = Action Required       |    Archived = No       |   191 patches
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Patch Series rb/tb S/W/F Date Submitter Delegate State
[ARC] Add *extvsi_n_0 define_insn_and_split for PR 110717. [ARC] Add *extvsi_n_0 define_insn_and_split for PR 110717. - - 4-- 2023-12-05 Roger Sayle New
Workaround array_slice constructor portability issues (with older g++). Workaround array_slice constructor portability issues (with older g++). - - 4-- 2023-12-03 Roger Sayle New
PR112380: Defend against CLOBBERs in RTX expressions in combine.cc PR112380: Defend against CLOBBERs in RTX expressions in combine.cc - - --2 2023-11-12 Roger Sayle New
[x86] Improve reg pressure of double-word right-shift then truncate. [x86] Improve reg pressure of double-word right-shift then truncate. - - 2-- 2023-11-12 Roger Sayle New
[ARC] Consistent use of whitespace in assembler templates. [ARC] Consistent use of whitespace in assembler templates. - - 4-- 2023-11-06 Roger Sayle New
[AVR] Improvements to SImode and PSImode shifts by constants. [AVR] Improvements to SImode and PSImode shifts by constants. - - 4-- 2023-11-02 Roger Sayle New
[AVR] Optimize (X>>C)&1 for C in [1, 4, 8, 16, 24] in *insv.any_shift.<mode>. [AVR] Optimize (X>>C)&1 for C in [1, 4, 8, 16, 24] in *insv.any_shift.<mode>. - - 4-- 2023-11-02 Roger Sayle New
[ARC] Improved ARC rtx_costs/insn_cost for SHIFTs and ROTATEs. [ARC] Improved ARC rtx_costs/insn_cost for SHIFTs and ROTATEs. - - 4-- 2023-10-29 Roger Sayle New
[ARC] Convert (signed<<31)>>31 to -(signed&1) without barrel shifter. [ARC] Convert (signed<<31)>>31 to -(signed&1) without barrel shifter. - - 4-- 2023-10-28 Roger Sayle New
[wwwdocs] Get newlib via git in simtest-howto.html [wwwdocs] Get newlib via git in simtest-howto.html - - --4 2023-10-27 Roger Sayle New
[ARC] Improved SImode shifts and rotates with -mswap. [ARC] Improved SImode shifts and rotates with -mswap. - - 4-- 2023-10-27 Roger Sayle New
[x86] PR target/110511: Fix reg allocation for widening multiplications. [x86] PR target/110511: Fix reg allocation for widening multiplications. - - 4-- 2023-10-17 Roger Sayle New
[x86] PR 106245: Split (x<<31)>>31 as -(x&1) in i386.md [x86] PR 106245: Split (x<<31)>>31 as -(x&1) in i386.md - - 4-- 2023-10-17 Roger Sayle New
PR 91865: Avoid ZERO_EXTEND of ZERO_EXTEND in make_compound_operation. PR 91865: Avoid ZERO_EXTEND of ZERO_EXTEND in make_compound_operation. - - 4-- 2023-10-14 Roger Sayle New
[ARC] Improved SImode shifts and rotates on !TARGET_BARREL_SHIFTER. [ARC] Improved SImode shifts and rotates on !TARGET_BARREL_SHIFTER. - - 4-- 2023-10-08 Roger Sayle New
[X86] Split lea into shorter left shift by 2 or 3 bits with -Oz. [X86] Split lea into shorter left shift by 2 or 3 bits with -Oz. - - 4-- 2023-10-05 Roger Sayle New
Support g++ 4.8 as a host compiler. Support g++ 4.8 as a host compiler. - - 4-- 2023-10-04 Roger Sayle New
[ARC] Split SImode shifts pre-reload on !TARGET_BARREL_SHIFTER. [ARC] Split SImode shifts pre-reload on !TARGET_BARREL_SHIFTER. - - --- 2023-09-28 Roger Sayle New
PR target/107671: Make more use of btl/btq on x86_64. PR target/107671: Make more use of btl/btq on x86_64. - - 4-- 2023-08-07 Roger Sayle New
PR rtl-optimization/110587: Reduce useless moves in compile-time hog. PR rtl-optimization/110587: Reduce useless moves in compile-time hog. - - 4-- 2023-07-25 Roger Sayle New
Replace lra-spill.cc's return_regno_p with return_reg_p. Replace lra-spill.cc's return_regno_p with return_reg_p. - - 4-- 2023-07-22 Roger Sayle New
[x86] Don't use insvti_{high, low}part with -O0 (for compile-time). [x86] Don't use insvti_{high, low}part with -O0 (for compile-time). - - 13- 2023-07-22 Roger Sayle New
PR c/110699: Defend against error_mark_node in gimplify.cc. PR c/110699: Defend against error_mark_node in gimplify.cc. - - 3-- 2023-07-19 Roger Sayle New
[x86_64] More TImode parameter passing improvements. [x86_64] More TImode parameter passing improvements. - - 21- 2023-07-19 Roger Sayle New
[x86] Add cbranchti4 pattern to i386.md (for -m32 compare_by_pieces). [x86] Add cbranchti4 pattern to i386.md (for -m32 compare_by_pieces). - - 2-- 2023-06-27 Roger Sayle New
[x86_64] Handle SUBREG conversions in TImode STV (for ptest). [x86_64] Handle SUBREG conversions in TImode STV (for ptest). - - 4-- 2023-06-24 Roger Sayle New
[RFC] Workaround LRA reload issue with SUBREGs in SET_DEST. [RFC] Workaround LRA reload issue with SUBREGs in SET_DEST. - - 4-- 2023-06-18 Roger Sayle New
[x86] Convert ptestz of pandn into ptestc. [x86] Convert ptestz of pandn into ptestc. - - 4-- 2023-06-13 Roger Sayle New
New finish_compare_by_pieces target hook (for x86). New finish_compare_by_pieces target hook (for x86). - - 4-- 2023-06-12 Roger Sayle New
[13] PR target/109973: CCZmode and CCCmode variants of [v]ptest. [13] PR target/109973: CCZmode and CCCmode variants of [v]ptest. - - --4 2023-06-10 Roger Sayle New
[x86] PR target/31985: Improve memory operand use with doubleword add. [x86] PR target/31985: Improve memory operand use with doubleword add. - - 2-- 2023-06-06 Roger Sayle New
[x86_64] PR target/110104: Missing peephole2 for addcarry<mode>. [x86_64] PR target/110104: Missing peephole2 for addcarry<mode>. - - 2-- 2023-06-06 Roger Sayle New
[x86] Add support for stc, clc and cmc instructions in i386.md [x86] Add support for stc, clc and cmc instructions in i386.md - - 4-- 2023-06-03 Roger Sayle New
New wi::bitreverse function. New wi::bitreverse function. - - --2 2023-06-02 Roger Sayle New
[x86_64] PR target/109973: CCZmode and CCCmode variants of [v]ptest. [x86_64] PR target/109973: CCZmode and CCCmode variants of [v]ptest. - - --- 2023-05-29 Roger Sayle New
Refactor wi::bswap as a function (instead of a method). Refactor wi::bswap as a function (instead of a method). - - --- 2023-05-28 Roger Sayle New
[i386] A minor code clean-up: Use NULL_RTX instead of nullptr [i386] A minor code clean-up: Use NULL_RTX instead of nullptr - - --- 2023-05-24 Roger Sayle New
[x86_64] PR middle-end/109766: Prevent cprop_hardreg bloating code with -Os. [x86_64] PR middle-end/109766: Prevent cprop_hardreg bloating code with -Os. - - --- 2023-05-11 Roger Sayle New
[take,#3] match.pd: Simplify popcount/parity of bswap/rotate. [take,#3] match.pd: Simplify popcount/parity of bswap/rotate. - - --- 2023-05-10 Roger Sayle New
[libgcc] Add bit reversal functions __bitrev[qhsd]i2. [libgcc] Add bit reversal functions __bitrev[qhsd]i2. - - --- 2023-05-06 Roger Sayle New
Add RTX codes for BITREVERSE and COPYSIGN. Add RTX codes for BITREVERSE and COPYSIGN. - - --- 2023-05-06 Roger Sayle New
[x86_64] Introduce insvti_highpart define_insn_and_split. [x86_64] Introduce insvti_highpart define_insn_and_split. - - --- 2023-05-06 Roger Sayle New
PR middle-end/109031: Fix final value replacement from narrower IVs. PR middle-end/109031: Fix final value replacement from narrower IVs. - - --- 2023-03-12 Roger Sayle New
PR rtl-optimization/106594: Preserve zero_extend in combine when cheap. PR rtl-optimization/106594: Preserve zero_extend in combine when cheap. - - --- 2023-03-04 Roger Sayle New
[DOC] Document the VEC_PERM_EXPR tree code (and minor clean-ups). [DOC] Document the VEC_PERM_EXPR tree code (and minor clean-ups). - - --- 2023-02-04 Roger Sayle New
[x86] PR rtl-optimization/107991: peephole2 to tweak register allocation. [x86] PR rtl-optimization/107991: peephole2 to tweak register allocation. - - --- 2023-01-09 Roger Sayle New
[nvptx] Correct pattern for popcountdi2 insn in nvptx.md. [nvptx] Correct pattern for popcountdi2 insn in nvptx.md. - - --- 2023-01-09 Roger Sayle New
[x86_64] Introduce insvti_highpart define_insn_and_split. [x86_64] Introduce insvti_highpart define_insn_and_split. - - --- 2023-01-05 Roger Sayle New
[x86_64] Add post-reload splitter for extendditi2. [x86_64] Add post-reload splitter for extendditi2. - - --- 2022-12-28 Roger Sayle New
[x86] Use movss/movsd to implement V4SI/V2DI VEC_PERM. [x86] Use movss/movsd to implement V4SI/V2DI VEC_PERM. - - --- 2022-12-23 Roger Sayle New
Optimize (X<<C)+(Y<<C) as (X+Y)<<C for signed addition. Optimize (X<<C)+(Y<<C) as (X+Y)<<C for signed addition. - - --- 2022-09-13 Roger Sayle New
PR tree-optimization/71343: Value number X<<2 as X*4. PR tree-optimization/71343: Value number X<<2 as X*4. - - --- 2022-09-13 Roger Sayle New
PR rtl-optimization/106594: Preserve zero_extend when cheap. PR rtl-optimization/106594: Preserve zero_extend when cheap. - - --- 2022-09-11 Roger Sayle New
[x86_64] Support shifts and rotates by integer constants in TImode STV. [x86_64] Support shifts and rotates by integer constants in TImode STV. - - --- 2022-08-15 Roger Sayle New
[x86,take,#2] Move V1TI shift/rotate lowering from expand to pre-reload split. [x86,take,#2] Move V1TI shift/rotate lowering from expand to pre-reload split. - - --- 2022-08-12 Roger Sayle New
[x86] PR target/106577: force_reg may clobber operands during split. [x86] PR target/106577: force_reg may clobber operands during split. - - --- 2022-08-12 Roger Sayle New
[x86_64] Use PTEST to perform AND in TImode STV of (A & B) != 0. [x86_64] Use PTEST to perform AND in TImode STV of (A & B) != 0. - - --- 2022-08-09 Roger Sayle New
PR tree-optimization/64992: (B << 2) != 0 is B when B is Boolean. PR tree-optimization/64992: (B << 2) != 0 is B when B is Boolean. - - --- 2022-08-08 Roger Sayle New
PR tree-optimization/71343: Optimize (X<<C)&(Y<<C) as (X&Y)<<C. PR tree-optimization/71343: Optimize (X<<C)&(Y<<C) as (X&Y)<<C. - - --- 2022-08-08 Roger Sayle New
middle-end: Optimize ((X >> C1) & C2) != C3 for more cases. middle-end: Optimize ((X >> C1) & C2) != C3 for more cases. - - --- 2022-08-07 Roger Sayle New
[x86,take,#2] Add peephole2 to reduce double word register shuffling [x86,take,#2] Add peephole2 to reduce double word register shuffling - - --- 2022-08-07 Roger Sayle New
[x86] Move V1TI shift/rotate lowering from expand to pre-reload split. [x86] Move V1TI shift/rotate lowering from expand to pre-reload split. - - --- 2022-08-05 Roger Sayle New
middle-end: Allow backend to expand/split double word compare to 0/-1. middle-end: Allow backend to expand/split double word compare to 0/-1. - - --- 2022-08-03 Roger Sayle New
[x86] PR target/47949: Use xchg to move from/to AX_REG with -Oz. [x86] PR target/47949: Use xchg to move from/to AX_REG with -Oz. - - --- 2022-08-02 Roger Sayle New
[take,#2] Some additional zero-extension related optimizations in simplify-rtx. [take,#2] Some additional zero-extension related optimizations in simplify-rtx. - - --- 2022-08-02 Roger Sayle New
[x86_64] PR target/106481: Handle CONST_WIDE_INT in REG_EQUAL during STV. [x86_64] PR target/106481: Handle CONST_WIDE_INT in REG_EQUAL during STV. - - --- 2022-08-01 Roger Sayle New
[Ada] Update configure to check for a recent gnat Ada compiler. [Ada] Update configure to check for a recent gnat Ada compiler. - - --- 2022-07-30 Roger Sayle New
PR bootstrap/106472: Add libgo depends on libbacktrace to Makefile.def PR bootstrap/106472: Add libgo depends on libbacktrace to Makefile.def - - --- 2022-07-30 Roger Sayle New
[x86_64,take,#2] PR target/106450: Tweak timode_remove_non_convertible_regs. [x86_64,take,#2] PR target/106450: Tweak timode_remove_non_convertible_regs. - - --- 2022-07-30 Roger Sayle New
[x86_64] PR target/106450: Tweak timode_remove_non_convertible_regs. [x86_64] PR target/106450: Tweak timode_remove_non_convertible_regs. - - --- 2022-07-28 Roger Sayle New
Some additional zero-extension related optimizations in simplify-rtx. Some additional zero-extension related optimizations in simplify-rtx. - - --- 2022-07-27 Roger Sayle New
middle-end: More support for ABIs that pass FP values as wider ints. middle-end: More support for ABIs that pass FP values as wider ints. - - --- 2022-07-26 Roger Sayle New
Add new target hook: simplify_modecc_const. Add new target hook: simplify_modecc_const. - - --- 2022-07-26 Roger Sayle New
[Documentation] Correct RTL documentation: (use (mem ...)) is allowed. [Documentation] Correct RTL documentation: (use (mem ...)) is allowed. - - --- 2022-07-23 Roger Sayle New
[x86,take,#3] PR target/91681: zero_extendditi2 pattern for more optimizations. [x86,take,#3] PR target/91681: zero_extendditi2 pattern for more optimizations. - - --- 2022-07-23 Roger Sayle New
[x86] PR target/106303: Fix TImode STV related failures. [x86] PR target/106303: Fix TImode STV related failures. - - --- 2022-07-23 Roger Sayle New
[middle-end] PR c/106264: Silence warnings from __builtin_modf et al. [middle-end] PR c/106264: Silence warnings from __builtin_modf et al. - - --- 2022-07-16 Roger Sayle New
[x86] PR target/106273: Add earlyclobber to *andn<dwi>3_doubleword_bmi [x86] PR target/106273: Add earlyclobber to *andn<dwi>3_doubleword_bmi - - --- 2022-07-15 Roger Sayle New
PR target/106278: Keep REG_EQUAL notes consistent during TImode STV. PR target/106278: Keep REG_EQUAL notes consistent during TImode STV. - - --- 2022-07-14 Roger Sayle New
Move reload_completed and other rtl.h globals to crtl structure. Move reload_completed and other rtl.h globals to crtl structure. - - --- 2022-07-10 Roger Sayle New
[x86_64] Improved Scalar-To-Vector (STV) support for TImode to V1TImode. [x86_64] Improved Scalar-To-Vector (STV) support for TImode to V1TImode. - - --- 2022-07-09 Roger Sayle New
[gcc12,backport] PR target/105930: Split *xordi3_doubleword after reload on x86. [gcc12,backport] PR target/105930: Split *xordi3_doubleword after reload on x86. - - --- 2022-07-09 Roger Sayle New
[x86] Fun with flags: Adding stc/clc instructions to i386.md. [x86] Fun with flags: Adding stc/clc instructions to i386.md. - - --- 2022-07-08 Roger Sayle New
Be careful with MODE_CC in simplify_const_relational_operation. Be careful with MODE_CC in simplify_const_relational_operation. - - --- 2022-07-07 Roger Sayle New
[PATCH/RFC] combine_completed global variable. [PATCH/RFC] combine_completed global variable. - - --- 2022-07-07 Roger Sayle New
[x86] Support *testdi_not_doubleword during STV pass. [x86] Support *testdi_not_doubleword during STV pass. - - --- 2022-07-07 Roger Sayle New
[x86] UNSPEC_PALIGNR optimizations and clean-ups. [x86] UNSPEC_PALIGNR optimizations and clean-ups. - - --- 2022-06-30 Roger Sayle New
[x86,take,#2] Double word logical operation clean-ups in i386.md. [x86,take,#2] Double word logical operation clean-ups in i386.md. - - --- 2022-06-30 Roger Sayle New
[x86] Double word logical operation clean-ups in i386.md. [x86] Double word logical operation clean-ups in i386.md. - - --- 2022-06-28 Roger Sayle New
[rs6000] Improve constant integer multiply using rldimi. [rs6000] Improve constant integer multiply using rldimi. - - --- 2022-06-26 Roger Sayle New
[x86] Use xchg for DImode double word rotate by 32 bits with -m32. [x86] Use xchg for DImode double word rotate by 32 bits with -m32. - - --- 2022-06-26 Roger Sayle New
[take,2] middle-end: Support ABIs that pass FP values as wider integers. [take,2] middle-end: Support ABIs that pass FP values as wider integers. - - --- 2022-06-26 Roger Sayle New
[x86] PR rtl-optimization/96692: ((A|B)^C)^A using andn with -mbmi. [x86] PR rtl-optimization/96692: ((A|B)^C)^A using andn with -mbmi. - - --- 2022-06-26 Roger Sayle New
[x86] PR target/105930: Split *xordi3_doubleword after reload. [x86] PR target/105930: Split *xordi3_doubleword after reload. - - --- 2022-06-22 Roger Sayle New
[rs6000] PR target/105991: Recognize PLUS and XOR forms of rldimi. [rs6000] PR target/105991: Recognize PLUS and XOR forms of rldimi. - - --- 2022-06-17 Roger Sayle New
[x86] Double word implementation of and; cmp to not; test optimization. [x86] Double word implementation of and; cmp to not; test optimization. - - --- 2022-06-05 Roger Sayle New
[take,#2] Fold truncations of left shifts in match.pd [take,#2] Fold truncations of left shifts in match.pd - - --- 2022-06-05 Roger Sayle New
[x86] Recognize vpcmov in combine with -mxop. [x86] Recognize vpcmov in combine with -mxop. - - --- 2022-06-04 Roger Sayle New
[x86] PR target/91681: zero_extendditi2 pattern for more optimizations. [x86] PR target/91681: zero_extendditi2 pattern for more optimizations. - - --- 2022-06-03 Roger Sayle New
[PATCH/RFC] cprop_hardreg... Third time's a charm. [PATCH/RFC] cprop_hardreg... Third time's a charm. - - --- 2022-06-02 Roger Sayle New
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