Message ID | 20221118111001.1488517-1-philipp.tomsich@vrull.eu |
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Return-Path: <gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org> X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 38F98384F487 for <patchwork@sourceware.org>; Fri, 18 Nov 2022 11:10:47 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-lj1-x230.google.com (mail-lj1-x230.google.com [IPv6:2a00:1450:4864:20::230]) by sourceware.org (Postfix) with ESMTPS id 651A23852C6F for <gcc-patches@gcc.gnu.org>; Fri, 18 Nov 2022 11:10:08 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 651A23852C6F Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=vrull.eu Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=vrull.eu Received: by mail-lj1-x230.google.com with SMTP id t10so6418391ljj.0 for <gcc-patches@gcc.gnu.org>; Fri, 18 Nov 2022 03:10:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vrull.eu; s=google; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=uGvj/xIGlPy6F8uReU70EwcPiSM3Wn5WmdhCAgMKMrM=; b=KYkOT58ilrscBlYoWhwkcDk1hfR9MrjwPqrOG8SXPlHpcFqjHSUKZD/x/KRmeF+GuJ tZUlf2hvSYxB7wN0e8E8FRLOMO5Nsp5+emN1B8TeEzBVY9YKj8G0hOQFzUB0X+GlTTG4 t8lK9M66jUcgIMjBHHC1ffPwRlh2LuVsO+q6ArafF5vshwb55BhM0gdpJniUL2+anNka 6554w17CqPPOkhXIXjXyZHYUd4hlYrJAXDX/CSngwUI6AmEJqUGNHnjvi7tyhfy53ypj lh8NjcJg0eUseA/IXYK/+MyMktYTXIimqUkrrS9KNZo1EeOcXxu9yDlYyqhr5YzkDJli rOAg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=uGvj/xIGlPy6F8uReU70EwcPiSM3Wn5WmdhCAgMKMrM=; b=MW7XPQ5su5X6yGB366piByp0kivkIsllSjE6ttYPRd6zrrRLZkIQYMptNQtRSd5ngG RNYrxBi4gkRd1hxGuvPtrJ6z54VpxfeKjRL3X7u26x5cQhrxyF1ruOmWHNESaZy23wXl zO1EdFTbqxwV/CYcgqFjlnlkODVDnucgboWFD+B+/H9d0qAxoC+nQM4P1EOg8rwO0My+ QF8UB0bKFQkUaGMVkqVH7+7uCwLsRdLC74G9CprV4rOaW+l6BgeloF+LG3gFiB0gOW6i bb7+3EFXXVt5cwLHNK9DKT8/mXCyoVss4QorihzVCOsTN498dYrBirpaz/G1z7eDIl8g QJkQ== X-Gm-Message-State: ANoB5pmCOJ0/gyaEXjwy1RtEgYbE0TjfZiVnrYoG1/+NvopwpkGz9Rnu fHURm6BSUgXogqDKu2P6F3Y9DyvYExScoLKZ X-Google-Smtp-Source: AA0mqf7ok+OsWqrK2Z9DDk0s5jtbq0Vk07FTmbPP1aC4WR2dnTd0iUGCdg9WcM58Og5Z7RyLaufaHQ== X-Received: by 2002:a2e:a594:0:b0:277:4150:b560 with SMTP id m20-20020a2ea594000000b002774150b560mr2532839ljp.299.1668769806357; Fri, 18 Nov 2022 03:10:06 -0800 (PST) Received: from ubuntu-focal.. ([2a01:4f9:3a:1e26::2]) by smtp.gmail.com with ESMTPSA id y21-20020ac24215000000b004947984b385sm618291lfh.87.2022.11.18.03.10.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Nov 2022 03:10:05 -0800 (PST) From: Philipp Tomsich <philipp.tomsich@vrull.eu> To: gcc-patches@gcc.gnu.org Cc: Kito Cheng <kito.cheng@gmail.com>, Palmer Dabbelt <palmer@rivosinc.com>, Vineet Gupta <vineetg@rivosinc.com>, Jeff Law <jlaw@ventanamicro.com>, Christoph Muellner <christoph.muellner@vrull.eu>, Philipp Tomsich <philipp.tomsich@vrull.eu> Subject: [PATCH v2 0/2] Use Zbs with xori/ori/andi and polarity-reversed twobit-tests Date: Fri, 18 Nov 2022 12:09:59 +0100 Message-Id: <20221118111001.1488517-1-philipp.tomsich@vrull.eu> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-6.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, JMQ_SPF_NEUTRAL, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list <gcc-patches.gcc.gnu.org> List-Unsubscribe: <https://gcc.gnu.org/mailman/options/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe> List-Archive: <https://gcc.gnu.org/pipermail/gcc-patches/> List-Post: <mailto:gcc-patches@gcc.gnu.org> List-Help: <mailto:gcc-patches-request@gcc.gnu.org?subject=help> List-Subscribe: <https://gcc.gnu.org/mailman/listinfo/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe> Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" <gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org> |
Series |
Use Zbs with xori/ori/andi and polarity-reversed twobit-tests
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Message
Philipp Tomsich
Nov. 18, 2022, 11:09 a.m. UTC
We had a few patches on the list that shared predicates (for extending the reach of xori and ori -- and for the branches on two polarity-reversed bits) and thus depended on each other. These all had approval with requested changes, so these are now collected together for v2. Note that this adds the (a & ~C) case, so please take a look on that part and OK the updated series. Changes in v2: - Collects already approved changes for v2 for (a | C) and (a ^ C). - Pulls in the (already) approved branch on polarity-reversed bits for v2, as it shares predicates with the other changes. - Newly adds support for the (a & ~C) case. Philipp Tomsich (2): RISC-V: Use bseti/bclri/binvi to extend reach of ori/andi/xori RISC-V: Handle "(a & twobits) == singlebit" in branches using Zbs gcc/config/riscv/bitmanip.md | 79 +++++++++++++++++++ gcc/config/riscv/iterators.md | 8 ++ gcc/config/riscv/predicates.md | 33 ++++++++ gcc/config/riscv/riscv.h | 8 ++ .../riscv/{zbs-bclri.c => zbs-bclri-01.c} | 0 gcc/testsuite/gcc.target/riscv/zbs-bclri-02.c | 27 +++++++ gcc/testsuite/gcc.target/riscv/zbs-binvi.c | 22 ++++++ gcc/testsuite/gcc.target/riscv/zbs-bseti.c | 27 +++++++ .../gcc.target/riscv/zbs-if_then_else-01.c | 20 +++++ 9 files changed, 224 insertions(+) rename gcc/testsuite/gcc.target/riscv/{zbs-bclri.c => zbs-bclri-01.c} (100%) create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-bclri-02.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-binvi.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-bseti.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-if_then_else-01.c
Comments
On 11/18/22 04:09, Philipp Tomsich wrote: > We had a few patches on the list that shared predicates (for extending > the reach of xori and ori -- and for the branches on two > polarity-reversed bits) and thus depended on each other. > > These all had approval with requested changes, so these are now > collected together for v2. > > Note that this adds the (a & ~C) case, so please take a look on that > part and OK the updated series. > > > > Changes in v2: > - Collects already approved changes for v2 for (a | C) and (a ^ C). > - Pulls in the (already) approved branch on polarity-reversed bits > for v2, as it shares predicates with the other changes. > - Newly adds support for the (a & ~C) case. > > Philipp Tomsich (2): > RISC-V: Use bseti/bclri/binvi to extend reach of ori/andi/xori > RISC-V: Handle "(a & twobits) == singlebit" in branches using Zbs > > gcc/config/riscv/bitmanip.md | 79 +++++++++++++++++++ > gcc/config/riscv/iterators.md | 8 ++ > gcc/config/riscv/predicates.md | 33 ++++++++ > gcc/config/riscv/riscv.h | 8 ++ > .../riscv/{zbs-bclri.c => zbs-bclri-01.c} | 0 > gcc/testsuite/gcc.target/riscv/zbs-bclri-02.c | 27 +++++++ > gcc/testsuite/gcc.target/riscv/zbs-binvi.c | 22 ++++++ > gcc/testsuite/gcc.target/riscv/zbs-bseti.c | 27 +++++++ > .../gcc.target/riscv/zbs-if_then_else-01.c | 20 +++++ > 9 files changed, 224 insertions(+) > rename gcc/testsuite/gcc.target/riscv/{zbs-bclri.c => zbs-bclri-01.c} (100%) > create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-bclri-02.c > create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-binvi.c > create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-bseti.c > create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-if_then_else-01.c 1/2 and 2/2 are both OK. jeff
(Both) applied to master. Thanks! --Philipp. On Fri, 18 Nov 2022 at 20:13, Jeff Law <jeffreyalaw@gmail.com> wrote: > > On 11/18/22 04:09, Philipp Tomsich wrote: > > We had a few patches on the list that shared predicates (for extending > > the reach of xori and ori -- and for the branches on two > > polarity-reversed bits) and thus depended on each other. > > > > These all had approval with requested changes, so these are now > > collected together for v2. > > > > Note that this adds the (a & ~C) case, so please take a look on that > > part and OK the updated series. > > > > > > > > Changes in v2: > > - Collects already approved changes for v2 for (a | C) and (a ^ C). > > - Pulls in the (already) approved branch on polarity-reversed bits > > for v2, as it shares predicates with the other changes. > > - Newly adds support for the (a & ~C) case. > > > > Philipp Tomsich (2): > > RISC-V: Use bseti/bclri/binvi to extend reach of ori/andi/xori > > RISC-V: Handle "(a & twobits) == singlebit" in branches using Zbs > > > > gcc/config/riscv/bitmanip.md | 79 +++++++++++++++++++ > > gcc/config/riscv/iterators.md | 8 ++ > > gcc/config/riscv/predicates.md | 33 ++++++++ > > gcc/config/riscv/riscv.h | 8 ++ > > .../riscv/{zbs-bclri.c => zbs-bclri-01.c} | 0 > > gcc/testsuite/gcc.target/riscv/zbs-bclri-02.c | 27 +++++++ > > gcc/testsuite/gcc.target/riscv/zbs-binvi.c | 22 ++++++ > > gcc/testsuite/gcc.target/riscv/zbs-bseti.c | 27 +++++++ > > .../gcc.target/riscv/zbs-if_then_else-01.c | 20 +++++ > > 9 files changed, 224 insertions(+) > > rename gcc/testsuite/gcc.target/riscv/{zbs-bclri.c => zbs-bclri-01.c} > (100%) > > create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-bclri-02.c > > create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-binvi.c > > create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-bseti.c > > create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-if_then_else-01.c > > 1/2 and 2/2 are both OK. > > jeff > >