diff mbox series

[1/7] aarch64: Enable mandatory feature bits for v9.4-A.

Message ID 20240522100439.1050296-2-srinath.parvathaneni@arm.com
State Superseded
Headers
Series aarch64: Fix the FEAT_SVE2p1 related issues. |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_binutils_build--master-arm success Testing passed
linaro-tcwg-bot/tcwg_binutils_build--master-aarch64 success Testing passed
linaro-tcwg-bot/tcwg_binutils_check--master-arm success Testing passed

Commit Message

srinath May 22, 2024, 10:04 a.m. UTC 
  Hi,

This patch fixes the mandatory feature bits in v9.4-a architectures,
by enabling FEAT_SVE2p1 for Armv9.4-A architecture by default.

Regression testing for aarch64-none-elf target and found no regressions.

Ok for binutils master?

Regards,
Srinath.
---
 gas/testsuite/gas/aarch64/sve2p1-1-bad.d  | 2 +-
 gas/testsuite/gas/aarch64/sve2p1-1.d      | 2 +-
 gas/testsuite/gas/aarch64/sve2p1-2-bad.d  | 4 ++++
 gas/testsuite/gas/aarch64/sve2p1-2-bad.l  | 2 ++
 gas/testsuite/gas/aarch64/sve2p1-nosve2.s | 1 +
 include/opcode/aarch64.h                  | 3 ++-
 6 files changed, 11 insertions(+), 3 deletions(-)
 create mode 100644 gas/testsuite/gas/aarch64/sve2p1-2-bad.d
 create mode 100644 gas/testsuite/gas/aarch64/sve2p1-2-bad.l
 create mode 100644 gas/testsuite/gas/aarch64/sve2p1-nosve2.s
diff mbox series

Patch

diff --git a/gas/testsuite/gas/aarch64/sve2p1-1-bad.d b/gas/testsuite/gas/aarch64/sve2p1-1-bad.d
index a2ca49ef487..c28cdc76c4c 100644
--- a/gas/testsuite/gas/aarch64/sve2p1-1-bad.d
+++ b/gas/testsuite/gas/aarch64/sve2p1-1-bad.d
@@ -1,4 +1,4 @@ 
 #name: Illegal test of SVE2.1 min max instructions.
-#as: -march=armv9.4-a
+#as: -march=armv9.3-a
 #source: sve2p1-1.s
 #error_output: sve2p1-1-bad.l
diff --git a/gas/testsuite/gas/aarch64/sve2p1-1.d b/gas/testsuite/gas/aarch64/sve2p1-1.d
index b93920cd02b..f562985b569 100644
--- a/gas/testsuite/gas/aarch64/sve2p1-1.d
+++ b/gas/testsuite/gas/aarch64/sve2p1-1.d
@@ -1,5 +1,5 @@ 
 #name: Test of SVE2.1 instructions
-#as: -march=armv9.4-a+sve2p1
+#as: -march=armv9.4-a
 #objdump: -dr
 
 [^:]+:     file format .*
diff --git a/gas/testsuite/gas/aarch64/sve2p1-2-bad.d b/gas/testsuite/gas/aarch64/sve2p1-2-bad.d
new file mode 100644
index 00000000000..4d58f4b0bd6
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2p1-2-bad.d
@@ -0,0 +1,4 @@ 
+#name: Illegal test of SVE2.1 instructions.
+#as: -march=armv9.4-a+nosve2
+#source: sve2p1-nosve2.s
+#error_output: sve2p1-2-bad.l
diff --git a/gas/testsuite/gas/aarch64/sve2p1-2-bad.l b/gas/testsuite/gas/aarch64/sve2p1-2-bad.l
new file mode 100644
index 00000000000..1e16026f47c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2p1-2-bad.l
@@ -0,0 +1,2 @@ 
+.*: Assembler messages:
+.*: Error: selected processor does not support `addqv v0.16b,p0,z16.b'
diff --git a/gas/testsuite/gas/aarch64/sve2p1-nosve2.s b/gas/testsuite/gas/aarch64/sve2p1-nosve2.s
new file mode 100644
index 00000000000..7f457ea26e4
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2p1-nosve2.s
@@ -0,0 +1 @@ 
+addqv v0.16b, p0, z16.b
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index ef4a3ffdcd3..8a58763ef78 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -325,7 +325,8 @@  enum aarch64_feature_bit {
 #define AARCH64_ARCH_V9_1A_FEATURES(X)	AARCH64_ARCH_V8_6A_FEATURES (X)
 #define AARCH64_ARCH_V9_2A_FEATURES(X)	AARCH64_ARCH_V8_7A_FEATURES (X)
 #define AARCH64_ARCH_V9_3A_FEATURES(X)	AARCH64_ARCH_V8_8A_FEATURES (X)
-#define AARCH64_ARCH_V9_4A_FEATURES(X)	AARCH64_ARCH_V8_9A_FEATURES (X)
+#define AARCH64_ARCH_V9_4A_FEATURES(X)	(AARCH64_ARCH_V8_9A_FEATURES (X) \
+					 | AARCH64_FEATBIT (X, SVE2p1))
 
 /* Architectures are the sum of the base and extensions.  */
 #define AARCH64_ARCH_V8A(X)	(AARCH64_FEATBIT (X, V8) \