Message ID | 20220325205014.32895-1-hjl.tools@gmail.com |
---|---|
State | Committed |
Commit | ede5f5224d55b84b9f186b288164df9c06fd85e7 |
Headers |
Return-Path: <gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org> X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 4A97C3840C05 for <patchwork@sourceware.org>; Fri, 25 Mar 2022 20:50:46 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 4A97C3840C05 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1648241446; bh=puklF0ykFT5BJ6jOAipHI0iV+WPMYa5EEWcrFIH3kl8=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=qWdaC7pMU+LWE1XGKsEAypy95B9+V/d/G+KX8k5qa0A71RfKSWDeNfKV7My/9ZsQ2 CXtxl5y47Uqn2YN5+GgCsqbBG9l1n3ublyJ+ae32PgGB8YYNs3uDiya5QODRj+wog7 adLvut6jpbiGrCsruDNh8F5wAJNTLzHiyE6INqA0= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-pj1-x1035.google.com (mail-pj1-x1035.google.com [IPv6:2607:f8b0:4864:20::1035]) by sourceware.org (Postfix) with ESMTPS id 022F13857404 for <gcc-patches@gcc.gnu.org>; Fri, 25 Mar 2022 20:50:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 022F13857404 Received: by mail-pj1-x1035.google.com with SMTP id l4-20020a17090a49c400b001c6840df4a3so9487235pjm.0 for <gcc-patches@gcc.gnu.org>; Fri, 25 Mar 2022 13:50:16 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=puklF0ykFT5BJ6jOAipHI0iV+WPMYa5EEWcrFIH3kl8=; b=QuT+lHdnR8hhT6o6opoM1FXN80fFvqotgoLXQ2x0qYgUeONp+KvCAcMspaqJJ9qWzG VeGLt0P7cOQTxj+PntzOhSNFHT2pUQ0d5kSk20+Q1GX2OrgDx5QQWDgoqsaGuZ9b9ZM1 zBy6WKJcmWyzxzblWJ6etHAe6JQX2xrEOKBsyVWJbnbWYBR2PZu4VnoBD/iBGpgXHsY7 T2qHDX6TeNGXpsRUxxvAPvA1GytH+WfVVKNV/wAzthCjoF9eqzlbdOSfWv46TANNiywB lv9DgGDDuTjXB6+RZ7gDxs8RFa+BtbV4N3GrMrZ0Rb51HIps4C6uNzFA5xFo7ESgnd6I uWZQ== X-Gm-Message-State: AOAM531aLZVRcSKCPzGebhj6u/FtkF/qFAyhiD0oIEmObTwRpHXaEpGI GtbW2vjFHDDvczDham1qVtCIbxgc0pk= X-Google-Smtp-Source: ABdhPJz2qlUR9fd/2CeDYZeAiZ1paJDAJhv1PQm5ZLQaF/EdJQg4HA61hrulrYTmszdUQztsQprKeg== X-Received: by 2002:a17:902:ccd1:b0:154:359:7e17 with SMTP id z17-20020a170902ccd100b0015403597e17mr13575050ple.42.1648241415771; Fri, 25 Mar 2022 13:50:15 -0700 (PDT) Received: from gnu-tgl-3.localdomain ([172.58.38.226]) by smtp.gmail.com with ESMTPSA id s14-20020a056a0008ce00b004f66dcd4f1csm8366757pfu.32.2022.03.25.13.50.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Mar 2022 13:50:15 -0700 (PDT) Received: from gnu-tgl-3.. (localhost [IPv6:::1]) by gnu-tgl-3.localdomain (Postfix) with ESMTP id 4AE19C00AA; Fri, 25 Mar 2022 13:50:14 -0700 (PDT) To: gcc-patches@gcc.gnu.org Subject: [PATCH] x86: Use x constraint on KL patterns Date: Fri, 25 Mar 2022 13:50:14 -0700 Message-Id: <20220325205014.32895-1-hjl.tools@gmail.com> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-3028.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list <gcc-patches.gcc.gnu.org> List-Unsubscribe: <https://gcc.gnu.org/mailman/options/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe> List-Archive: <https://gcc.gnu.org/pipermail/gcc-patches/> List-Post: <mailto:gcc-patches@gcc.gnu.org> List-Help: <mailto:gcc-patches-request@gcc.gnu.org?subject=help> List-Subscribe: <https://gcc.gnu.org/mailman/listinfo/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe> From: "H.J. Lu via Gcc-patches" <gcc-patches@gcc.gnu.org> Reply-To: "H.J. Lu" <hjl.tools@gmail.com> Cc: liuhongt <hongtao.liu@intel.com> Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" <gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org> |
Series |
x86: Use x constraint on KL patterns
|
|
Commit Message
H.J. Lu
March 25, 2022, 8:50 p.m. UTC
Since KL instructions have no AVX512 version, replace the "v" register constraint with the "x" register constraint. PR target/105058 * config/i386/sse.md (loadiwkey): Replace "v" with "x". (aes<aesklvariant>u8): Likewise. --- gcc/config/i386/sse.md | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
Comments
Is it possible to create a test case that gas would throw an error for invalid operands? H.J. Lu via Gcc-patches <gcc-patches@gcc.gnu.org> 于2022年3月26日周六 04:50写道: > > Since KL instructions have no AVX512 version, replace the "v" register > constraint with the "x" register constraint. > > PR target/105058 > * config/i386/sse.md (loadiwkey): Replace "v" with "x". > (aes<aesklvariant>u8): Likewise. > --- > gcc/config/i386/sse.md | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md > index 29802d00ce6..33bd2c4768a 100644 > --- a/gcc/config/i386/sse.md > +++ b/gcc/config/i386/sse.md > @@ -28364,8 +28364,8 @@ (define_insn "avx512f_dpbf16ps_<mode>_mask" > > ;; KEYLOCKER > (define_insn "loadiwkey" > - [(unspec_volatile:V2DI [(match_operand:V2DI 0 "register_operand" "v") > - (match_operand:V2DI 1 "register_operand" "v") > + [(unspec_volatile:V2DI [(match_operand:V2DI 0 "register_operand" "x") > + (match_operand:V2DI 1 "register_operand" "x") > (match_operand:V2DI 2 "register_operand" "Yz") > (match_operand:SI 3 "register_operand" "a")] > UNSPECV_LOADIWKEY) > @@ -28498,7 +28498,7 @@ (define_int_attr aesklvariant > (UNSPECV_AESENC256KLU8 "enc256kl")]) > > (define_insn "aes<aesklvariant>u8" > - [(set (match_operand:V2DI 0 "register_operand" "=v") > + [(set (match_operand:V2DI 0 "register_operand" "=x") > (unspec_volatile:V2DI [(match_operand:V2DI 1 "register_operand" "0") > (match_operand:BLK 2 "memory_operand" "m")] > AESDECENCKL)) > -- > 2.35.1 >
On Fri, Mar 25, 2022 at 6:08 PM Hongyu Wang <wwwhhhyyy333@gmail.com> wrote: > > Is it possible to create a test case that gas would throw an error for > invalid operands? You can use -ffix-xmmN to disable XMM0-15. > H.J. Lu via Gcc-patches <gcc-patches@gcc.gnu.org> 于2022年3月26日周六 04:50写道: > > > > Since KL instructions have no AVX512 version, replace the "v" register > > constraint with the "x" register constraint. > > > > PR target/105058 > > * config/i386/sse.md (loadiwkey): Replace "v" with "x". > > (aes<aesklvariant>u8): Likewise. > > --- > > gcc/config/i386/sse.md | 6 +++--- > > 1 file changed, 3 insertions(+), 3 deletions(-) > > > > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md > > index 29802d00ce6..33bd2c4768a 100644 > > --- a/gcc/config/i386/sse.md > > +++ b/gcc/config/i386/sse.md > > @@ -28364,8 +28364,8 @@ (define_insn "avx512f_dpbf16ps_<mode>_mask" > > > > ;; KEYLOCKER > > (define_insn "loadiwkey" > > - [(unspec_volatile:V2DI [(match_operand:V2DI 0 "register_operand" "v") > > - (match_operand:V2DI 1 "register_operand" "v") > > + [(unspec_volatile:V2DI [(match_operand:V2DI 0 "register_operand" "x") > > + (match_operand:V2DI 1 "register_operand" "x") > > (match_operand:V2DI 2 "register_operand" "Yz") > > (match_operand:SI 3 "register_operand" "a")] > > UNSPECV_LOADIWKEY) > > @@ -28498,7 +28498,7 @@ (define_int_attr aesklvariant > > (UNSPECV_AESENC256KLU8 "enc256kl")]) > > > > (define_insn "aes<aesklvariant>u8" > > - [(set (match_operand:V2DI 0 "register_operand" "=v") > > + [(set (match_operand:V2DI 0 "register_operand" "=x") > > (unspec_volatile:V2DI [(match_operand:V2DI 1 "register_operand" "0") > > (match_operand:BLK 2 "memory_operand" "m")] > > AESDECENCKL)) > > -- > > 2.35.1 > >
> > Is it possible to create a test case that gas would throw an error for > > invalid operands? > > You can use -ffix-xmmN to disable XMM0-15. I mean can we create an intrinsic test for this PR that produces xmm16-31? And the -ffix-xmmN is an option for assembler or compiler? I didn't find it in document. H.J. Lu <hjl.tools@gmail.com> 于2022年3月26日周六 09:22写道: > > On Fri, Mar 25, 2022 at 6:08 PM Hongyu Wang <wwwhhhyyy333@gmail.com> wrote: > > > > Is it possible to create a test case that gas would throw an error for > > invalid operands? > > You can use -ffix-xmmN to disable XMM0-15. > > > H.J. Lu via Gcc-patches <gcc-patches@gcc.gnu.org> 于2022年3月26日周六 04:50写道: > > > > > > Since KL instructions have no AVX512 version, replace the "v" register > > > constraint with the "x" register constraint. > > > > > > PR target/105058 > > > * config/i386/sse.md (loadiwkey): Replace "v" with "x". > > > (aes<aesklvariant>u8): Likewise. > > > --- > > > gcc/config/i386/sse.md | 6 +++--- > > > 1 file changed, 3 insertions(+), 3 deletions(-) > > > > > > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md > > > index 29802d00ce6..33bd2c4768a 100644 > > > --- a/gcc/config/i386/sse.md > > > +++ b/gcc/config/i386/sse.md > > > @@ -28364,8 +28364,8 @@ (define_insn "avx512f_dpbf16ps_<mode>_mask" > > > > > > ;; KEYLOCKER > > > (define_insn "loadiwkey" > > > - [(unspec_volatile:V2DI [(match_operand:V2DI 0 "register_operand" "v") > > > - (match_operand:V2DI 1 "register_operand" "v") > > > + [(unspec_volatile:V2DI [(match_operand:V2DI 0 "register_operand" "x") > > > + (match_operand:V2DI 1 "register_operand" "x") > > > (match_operand:V2DI 2 "register_operand" "Yz") > > > (match_operand:SI 3 "register_operand" "a")] > > > UNSPECV_LOADIWKEY) > > > @@ -28498,7 +28498,7 @@ (define_int_attr aesklvariant > > > (UNSPECV_AESENC256KLU8 "enc256kl")]) > > > > > > (define_insn "aes<aesklvariant>u8" > > > - [(set (match_operand:V2DI 0 "register_operand" "=v") > > > + [(set (match_operand:V2DI 0 "register_operand" "=x") > > > (unspec_volatile:V2DI [(match_operand:V2DI 1 "register_operand" "0") > > > (match_operand:BLK 2 "memory_operand" "m")] > > > AESDECENCKL)) > > > -- > > > 2.35.1 > > > > > > > -- > H.J.
On Fri, Mar 25, 2022 at 7:04 PM Hongyu Wang <wwwhhhyyy333@gmail.com> wrote: > > > > Is it possible to create a test case that gas would throw an error for > > > invalid operands? > > > > You can use -ffix-xmmN to disable XMM0-15. > > I mean can we create an intrinsic test for this PR that produces xmm16-31? > And the -ffix-xmmN is an option for assembler or compiler? I didn't > find it in document. You can add -march=skylake-avx512 -ffix-xmm0 ... -ffix-xmm15 to force XMM16-XMM31. > H.J. Lu <hjl.tools@gmail.com> 于2022年3月26日周六 09:22写道: > > > > On Fri, Mar 25, 2022 at 6:08 PM Hongyu Wang <wwwhhhyyy333@gmail.com> wrote: > > > > > > Is it possible to create a test case that gas would throw an error for > > > invalid operands? > > > > You can use -ffix-xmmN to disable XMM0-15. > > > > > H.J. Lu via Gcc-patches <gcc-patches@gcc.gnu.org> 于2022年3月26日周六 04:50写道: > > > > > > > > Since KL instructions have no AVX512 version, replace the "v" register > > > > constraint with the "x" register constraint. > > > > > > > > PR target/105058 > > > > * config/i386/sse.md (loadiwkey): Replace "v" with "x". > > > > (aes<aesklvariant>u8): Likewise. > > > > --- > > > > gcc/config/i386/sse.md | 6 +++--- > > > > 1 file changed, 3 insertions(+), 3 deletions(-) > > > > > > > > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md > > > > index 29802d00ce6..33bd2c4768a 100644 > > > > --- a/gcc/config/i386/sse.md > > > > +++ b/gcc/config/i386/sse.md > > > > @@ -28364,8 +28364,8 @@ (define_insn "avx512f_dpbf16ps_<mode>_mask" > > > > > > > > ;; KEYLOCKER > > > > (define_insn "loadiwkey" > > > > - [(unspec_volatile:V2DI [(match_operand:V2DI 0 "register_operand" "v") > > > > - (match_operand:V2DI 1 "register_operand" "v") > > > > + [(unspec_volatile:V2DI [(match_operand:V2DI 0 "register_operand" "x") > > > > + (match_operand:V2DI 1 "register_operand" "x") > > > > (match_operand:V2DI 2 "register_operand" "Yz") > > > > (match_operand:SI 3 "register_operand" "a")] > > > > UNSPECV_LOADIWKEY) > > > > @@ -28498,7 +28498,7 @@ (define_int_attr aesklvariant > > > > (UNSPECV_AESENC256KLU8 "enc256kl")]) > > > > > > > > (define_insn "aes<aesklvariant>u8" > > > > - [(set (match_operand:V2DI 0 "register_operand" "=v") > > > > + [(set (match_operand:V2DI 0 "register_operand" "=x") > > > > (unspec_volatile:V2DI [(match_operand:V2DI 1 "register_operand" "0") > > > > (match_operand:BLK 2 "memory_operand" "m")] > > > > AESDECENCKL)) > > > > -- > > > > 2.35.1 > > > > > > > > > > > > -- > > H.J.
On Sat, Mar 26, 2022 at 4:50 AM H.J. Lu via Gcc-patches <gcc-patches@gcc.gnu.org> wrote: > > Since KL instructions have no AVX512 version, replace the "v" register > constraint with the "x" register constraint. > > PR target/105058 > * config/i386/sse.md (loadiwkey): Replace "v" with "x". > (aes<aesklvariant>u8): Likewise. LGTM, please backport to GCC11. > --- > gcc/config/i386/sse.md | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md > index 29802d00ce6..33bd2c4768a 100644 > --- a/gcc/config/i386/sse.md > +++ b/gcc/config/i386/sse.md > @@ -28364,8 +28364,8 @@ (define_insn "avx512f_dpbf16ps_<mode>_mask" > > ;; KEYLOCKER > (define_insn "loadiwkey" > - [(unspec_volatile:V2DI [(match_operand:V2DI 0 "register_operand" "v") > - (match_operand:V2DI 1 "register_operand" "v") > + [(unspec_volatile:V2DI [(match_operand:V2DI 0 "register_operand" "x") > + (match_operand:V2DI 1 "register_operand" "x") > (match_operand:V2DI 2 "register_operand" "Yz") > (match_operand:SI 3 "register_operand" "a")] > UNSPECV_LOADIWKEY) > @@ -28498,7 +28498,7 @@ (define_int_attr aesklvariant > (UNSPECV_AESENC256KLU8 "enc256kl")]) > > (define_insn "aes<aesklvariant>u8" > - [(set (match_operand:V2DI 0 "register_operand" "=v") > + [(set (match_operand:V2DI 0 "register_operand" "=x") > (unspec_volatile:V2DI [(match_operand:V2DI 1 "register_operand" "0") > (match_operand:BLK 2 "memory_operand" "m")] > AESDECENCKL)) > -- > 2.35.1 >
On Sat, Mar 26, 2022 at 10:05 AM Hongyu Wang via Gcc-patches <gcc-patches@gcc.gnu.org> wrote: > > > > Is it possible to create a test case that gas would throw an error for > > > invalid operands? > > > > You can use -ffix-xmmN to disable XMM0-15. > > I mean can we create an intrinsic test for this PR that produces xmm16-31? > And the -ffix-xmmN is an option for assembler or compiler? I didn't > find it in document. Can be reproduced by below testcase. #include <immintrin.h> unsigned int ctrl; __m128i k1, k2, k3; void test_keylocker_11 (void) { register __m128i k4 __asm ("xmm16") = k2; asm volatile ("" : "+v" (k4)); _mm_loadiwkey (ctrl, k1, k4, k3); } /tmp/ccy9VHP9.s: Assembler messages: /tmp/ccy9VHP9.s:13: Error: unsupported instruction `loadiwkey' > > H.J. Lu <hjl.tools@gmail.com> 于2022年3月26日周六 09:22写道: > > > > On Fri, Mar 25, 2022 at 6:08 PM Hongyu Wang <wwwhhhyyy333@gmail.com> wrote: > > > > > > Is it possible to create a test case that gas would throw an error for > > > invalid operands? > > > > You can use -ffix-xmmN to disable XMM0-15. > > > > > H.J. Lu via Gcc-patches <gcc-patches@gcc.gnu.org> 于2022年3月26日周六 04:50写道: > > > > > > > > Since KL instructions have no AVX512 version, replace the "v" register > > > > constraint with the "x" register constraint. > > > > > > > > PR target/105058 > > > > * config/i386/sse.md (loadiwkey): Replace "v" with "x". > > > > (aes<aesklvariant>u8): Likewise. > > > > --- > > > > gcc/config/i386/sse.md | 6 +++--- > > > > 1 file changed, 3 insertions(+), 3 deletions(-) > > > > > > > > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md > > > > index 29802d00ce6..33bd2c4768a 100644 > > > > --- a/gcc/config/i386/sse.md > > > > +++ b/gcc/config/i386/sse.md > > > > @@ -28364,8 +28364,8 @@ (define_insn "avx512f_dpbf16ps_<mode>_mask" > > > > > > > > ;; KEYLOCKER > > > > (define_insn "loadiwkey" > > > > - [(unspec_volatile:V2DI [(match_operand:V2DI 0 "register_operand" "v") > > > > - (match_operand:V2DI 1 "register_operand" "v") > > > > + [(unspec_volatile:V2DI [(match_operand:V2DI 0 "register_operand" "x") > > > > + (match_operand:V2DI 1 "register_operand" "x") > > > > (match_operand:V2DI 2 "register_operand" "Yz") > > > > (match_operand:SI 3 "register_operand" "a")] > > > > UNSPECV_LOADIWKEY) > > > > @@ -28498,7 +28498,7 @@ (define_int_attr aesklvariant > > > > (UNSPECV_AESENC256KLU8 "enc256kl")]) > > > > > > > > (define_insn "aes<aesklvariant>u8" > > > > - [(set (match_operand:V2DI 0 "register_operand" "=v") > > > > + [(set (match_operand:V2DI 0 "register_operand" "=x") > > > > (unspec_volatile:V2DI [(match_operand:V2DI 1 "register_operand" "0") > > > > (match_operand:BLK 2 "memory_operand" "m")] > > > > AESDECENCKL)) > > > > -- > > > > 2.35.1 > > > > > > > > > > > > -- > > H.J.
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 29802d00ce6..33bd2c4768a 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -28364,8 +28364,8 @@ (define_insn "avx512f_dpbf16ps_<mode>_mask" ;; KEYLOCKER (define_insn "loadiwkey" - [(unspec_volatile:V2DI [(match_operand:V2DI 0 "register_operand" "v") - (match_operand:V2DI 1 "register_operand" "v") + [(unspec_volatile:V2DI [(match_operand:V2DI 0 "register_operand" "x") + (match_operand:V2DI 1 "register_operand" "x") (match_operand:V2DI 2 "register_operand" "Yz") (match_operand:SI 3 "register_operand" "a")] UNSPECV_LOADIWKEY) @@ -28498,7 +28498,7 @@ (define_int_attr aesklvariant (UNSPECV_AESENC256KLU8 "enc256kl")]) (define_insn "aes<aesklvariant>u8" - [(set (match_operand:V2DI 0 "register_operand" "=v") + [(set (match_operand:V2DI 0 "register_operand" "=x") (unspec_volatile:V2DI [(match_operand:V2DI 1 "register_operand" "0") (match_operand:BLK 2 "memory_operand" "m")] AESDECENCKL))