RISC-V: Pattern name fix mulm3_highpart -> smulm3_highpart.
Commit Message
gcc/ChangeLog:
* config/riscv/riscv.md
(<u>muldi3_highpart): Rename to <su>muldi3_highpart.
(<u>mulditi3): Emit <su>muldi3_highpart.
(<u>mulsi3_highpart): Rename to <su>mulsi3_highpart.
(<u>mulsidi3): Emit <su>mulsi3_highpart.
---
gcc/config/riscv/riscv.md | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
Comments
On Mon, Sep 27, 2021 at 4:38 AM Geng Qi via Gcc-patches <
gcc-patches@gcc.gnu.org> wrote:
> gcc/ChangeLog:
> * config/riscv/riscv.md
> (<u>muldi3_highpart): Rename to <su>muldi3_highpart.
> (<u>mulditi3): Emit <su>muldi3_highpart.
> (<u>mulsi3_highpart): Rename to <su>mulsi3_highpart.
> (<u>mulsidi3): Emit <su>mulsi3_highpart.
>
This doesn't build on top of tree sources. It is missing the
mulv<mode>3_highpart change I mentioned in the riscv-gcc review. Also, I
prefer that the order of the changelog entries match the order of hunks in
the patch, it is easier to review that way. Otherwise, the patch is OK and
I committed it with minor changes. Since I changed it, I need to send the
patch I did actually commit.
Jim
@@ -899,14 +899,14 @@
emit_insn (gen_muldi3 (low, operands[1], operands[2]));
rtx high = gen_reg_rtx (DImode);
- emit_insn (gen_<u>muldi3_highpart (high, operands[1], operands[2]));
+ emit_insn (gen_<su>muldi3_highpart (high, operands[1], operands[2]));
emit_move_insn (gen_lowpart (DImode, operands[0]), low);
emit_move_insn (gen_highpart (DImode, operands[0]), high);
DONE;
})
-(define_insn "<u>muldi3_highpart"
+(define_insn "<su>muldi3_highpart"
[(set (match_operand:DI 0 "register_operand" "=r")
(truncate:DI
(lshiftrt:TI
@@ -961,13 +961,13 @@
{
rtx temp = gen_reg_rtx (SImode);
emit_insn (gen_mulsi3 (temp, operands[1], operands[2]));
- emit_insn (gen_<u>mulsi3_highpart (riscv_subword (operands[0], true),
+ emit_insn (gen_<su>mulsi3_highpart (riscv_subword (operands[0], true),
operands[1], operands[2]));
emit_insn (gen_movsi (riscv_subword (operands[0], false), temp));
DONE;
})
-(define_insn "<u>mulsi3_highpart"
+(define_insn "<su>mulsi3_highpart"
[(set (match_operand:SI 0 "register_operand" "=r")
(truncate:SI
(lshiftrt:DI