diff mbox series

[powerpc] fegetenv_and_set_rn now uses the builtins provided by GCC.

Message ID 20230923154951.3783611-1-mmatti@linux.ibm.com
State Committed
Commit 4eac1825ed92e88c192abb436412d5fb84ddd854
Headers
Series [powerpc] fegetenv_and_set_rn now uses the builtins provided by GCC. |

Checks

Context Check Description
redhat-pt-bot/TryBot-apply_patch success Patch applied to master at the time it was sent
redhat-pt-bot/TryBot-32bit success Build for i686
linaro-tcwg-bot/tcwg_glibc_build--master-arm success Testing passed
linaro-tcwg-bot/tcwg_glibc_check--master-arm success Testing passed
linaro-tcwg-bot/tcwg_glibc_build--master-aarch64 success Testing passed
linaro-tcwg-bot/tcwg_glibc_check--master-aarch64 success Testing passed

Commit Message

Manjunath Matti Sept. 23, 2023, 3:49 p.m. UTC 
  On powerpc, SET_RESTORE_ROUND uses inline assembly to optimize the
prologue get/save/set rounding mode operations for POWER9 and
later by using 'mffscrn' where possible, this was introduced by
commit f1c56cdff09f650ad721fae026eb6a3651631f3d.

GCC version 14 onwards supports builtins as __builtin_set_fpscr_rn
which now returns the FPSCR fields in a double. This feature is
available on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro
is defined.
GCC commit ef3bbc69d15707e4db6e2f198c621effb636cc26 adds
this feature.

Changes are done to use __builtin_set_fpscr_rn instead of mffscrn
or mffscrni in __fe_mffscrn(rn).

Suggested-by: Carl Love <cel@us.ibm.com>
---
 sysdeps/powerpc/fpu/fenv_libc.h | 9 +++++++++
 1 file changed, 9 insertions(+)

Comments

Adhemerval Zanella Netto Sept. 27, 2023, 4:56 p.m. UTC | #1 
On 23/09/23 12:49, Manjunath Matti wrote:
> On powerpc, SET_RESTORE_ROUND uses inline assembly to optimize the
> prologue get/save/set rounding mode operations for POWER9 and
> later by using 'mffscrn' where possible, this was introduced by
> commit f1c56cdff09f650ad721fae026eb6a3651631f3d.
> 
> GCC version 14 onwards supports builtins as __builtin_set_fpscr_rn
> which now returns the FPSCR fields in a double. This feature is
> available on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro
> is defined.
> GCC commit ef3bbc69d15707e4db6e2f198c621effb636cc26 adds
> this feature.
> 
> Changes are done to use __builtin_set_fpscr_rn instead of mffscrn
> or mffscrni in __fe_mffscrn(rn).
> 
> Suggested-by: Carl Love <cel@us.ibm.com>

LGTM, thanks.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>

> ---
>  sysdeps/powerpc/fpu/fenv_libc.h | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h
> index fa5e1c697e..a2a12d914b 100644
> --- a/sysdeps/powerpc/fpu/fenv_libc.h
> +++ b/sysdeps/powerpc/fpu/fenv_libc.h
> @@ -68,6 +68,14 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
>      __fr;								\
>    })
>  
> +/* Starting with GCC 14 __builtin_set_fpscr_rn can be used to return the
> +   FPSCR fields as a double.  This support is available
> +   on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro is defined.
> +   To retain backward compatibility with older GCC, we still retain the
> +   old inline assembly implementation.*/
> +#ifdef __SET_FPSCR_RN_RETURNS_FPSCR__
> +#define __fe_mffscrn(rn)  __builtin_set_fpscr_rn (rn)
> +#else
>  #define __fe_mffscrn(rn)						\
>    ({register fenv_union_t __fr;						\
>      if (__builtin_constant_p (rn))					\
> @@ -83,6 +91,7 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
>      }									\
>      __fr.fenv;								\
>    })
> +#endif
>  
>  /* Like fegetenv_control, but also sets the rounding mode.  */
>  #ifdef _ARCH_PWR9
Peter Bergner Oct. 19, 2023, 1:47 a.m. UTC | #2 
On 9/23/23 10:49 AM, Manjunath Matti wrote:
> GCC version 14 onwards supports builtins as __builtin_set_fpscr_rn
> which now returns the FPSCR fields in a double. This feature is
> available on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro
> is defined.

The last sentence is not completely correct, since the feature is available
on pre-Power9 cpus too.  The first sentence could be worded a little better
too.  How about:

GCC version 14 onwards supports the __builtin_set_fpscr_rn built-in, 
which now returns the FPSCR fields in a double. This feature is
available when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro is defined.

Peter
diff mbox series

Patch

diff --git a/sysdeps/powerpc/fpu/fenv_libc.h b/sysdeps/powerpc/fpu/fenv_libc.h
index fa5e1c697e..a2a12d914b 100644
--- a/sysdeps/powerpc/fpu/fenv_libc.h
+++ b/sysdeps/powerpc/fpu/fenv_libc.h
@@ -68,6 +68,14 @@  extern const fenv_t *__fe_mask_env (void) attribute_hidden;
     __fr;								\
   })
 
+/* Starting with GCC 14 __builtin_set_fpscr_rn can be used to return the
+   FPSCR fields as a double.  This support is available
+   on Power9 when the __SET_FPSCR_RN_RETURNS_FPSCR__ macro is defined.
+   To retain backward compatibility with older GCC, we still retain the
+   old inline assembly implementation.*/
+#ifdef __SET_FPSCR_RN_RETURNS_FPSCR__
+#define __fe_mffscrn(rn)  __builtin_set_fpscr_rn (rn)
+#else
 #define __fe_mffscrn(rn)						\
   ({register fenv_union_t __fr;						\
     if (__builtin_constant_p (rn))					\
@@ -83,6 +91,7 @@  extern const fenv_t *__fe_mask_env (void) attribute_hidden;
     }									\
     __fr.fenv;								\
   })
+#endif
 
 /* Like fegetenv_control, but also sets the rounding mode.  */
 #ifdef _ARCH_PWR9