diff mbox series

sim: m32c: fix -Wshadow=local warnings

Message ID 20231223042843.9399-1-vapier@gentoo.org
State New
Headers
Series sim: m32c: fix -Wshadow=local warnings |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_gdb_build--master-aarch64 warning Patch is already merged
linaro-tcwg-bot/tcwg_gdb_build--master-arm warning Patch is already merged

Commit Message

Mike Frysinger Dec. 23, 2023, 4:28 a.m. UTC 
  These decoders declare a lot of common variables for use by substeps,
and then shadows a few because of how the opc generator is implemented.
Easiest way around it is to rename the per-substep vars as needed as
anything more would require substantial changes to the opc logic.
---
 sim/m32c/m32c.opc | 13 +++++--------
 sim/m32c/r8c.opc  |  8 ++++----
 2 files changed, 9 insertions(+), 12 deletions(-)
diff mbox series

Patch

diff --git a/sim/m32c/m32c.opc b/sim/m32c/m32c.opc
index cc6ef9fbc576..02c894d216b0 100644
--- a/sim/m32c/m32c.opc
+++ b/sim/m32c/m32c.opc
@@ -728,11 +728,11 @@  next_opcode:
   b = get_bit2 (sc, bit);
   set_zc (!b, b);
 
-  /** 00bb 101b				BTST:S src */
+  /** 00bb 101bit			BTST:S src */
 
   sc = decode_src23 (3, 3, 1); /* bit,base:19 */
-  b = get_bit2 (sc, bb*2 + b);
-  set_zc (!b, b);
+  bit = get_bit2 (sc, bb*2 + bit);
+  set_zc (!bit, bit);
 
   /** 1101 ddd0 dd10 0bit		BTSTC dest */
 
@@ -1170,9 +1170,9 @@  next_opcode:
 
   NOTYET();
 
-  /** 1101 0101 1110 1imm		LDIPL #IMM */
+  /** 1101 0101 1110 1flg		LDIPL #IMM */
 
-  set_flags (0x7000, imm*0x1000);
+  set_flags (0x7000, flg*0x1000);
 
   /** 0000 0001 1000 ddd w dd11 1111	MAX.size #IMM,dest */
 
@@ -1589,8 +1589,6 @@  next_opcode:
 
   /** 1010 111w				PUSH.size #IMM */
 
-  {
-  int a;
   prefix (0, 0, 0);
   imm = IMM(w+1);
   tprintf("push%s: %x\n", w ? "hi" : "qi", imm);
@@ -1600,7 +1598,6 @@  next_opcode:
   else
     mem_put_qi (a, imm);
   put_reg (sp, a);
-  }
 
   /** 1100 sss w ss00 1110		PUSH.size src */
 
diff --git a/sim/m32c/r8c.opc b/sim/m32c/r8c.opc
index c5d8929f6ab9..9c35e13f0c5d 100644
--- a/sim/m32c/r8c.opc
+++ b/sim/m32c/r8c.opc
@@ -880,9 +880,9 @@  decode_r8c (void)
     v = mem_get_qi (imm);
   put_dest (dc, v);
 
-  /** 0111 1101 1010 0imm  LDIPL #IMM */
+  /** 0111 1101 1010 0flg  LDIPL #IMM */
 
-  set_flags (0x700, imm*0x100);
+  set_flags (0x700, flg*0x100);
 
   /** 0111 010w 1100 dest  MOV.size:G #IMM,dest */
 
@@ -1380,13 +1380,13 @@  decode_r8c (void)
   a = sign_ext (get_reg (r1h), 8);
   shift_op (dc, 0, a);
 
-  /** 0111 110w 1110 100b  SMOVB.size */
+  /** 0111 110w 1110 100z  SMOVB.size */
 
   {
   int count = get_reg (r3);
   int s1 = get_reg (a0) + (get_reg (r1h) << 16);
   int s2 = get_reg (a1);
-  int inc = (w ? 2 : 1) * (b ? -1 : 1);
+  int inc = (w ? 2 : 1) * (z ? -1 : 1);
 
   while (count)
     {