From patchwork Sat Dec 23 04:28:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mike Frysinger X-Patchwork-Id: 82784 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 41FC8385828D for ; Sat, 23 Dec 2023 04:29:06 +0000 (GMT) X-Original-To: gdb-patches@sourceware.org Delivered-To: gdb-patches@sourceware.org Received: from smtp.gentoo.org (smtp.gentoo.org [IPv6:2001:470:ea4a:1:5054:ff:fec7:86e4]) by sourceware.org (Postfix) with ESMTP id 6994B3858D33 for ; Sat, 23 Dec 2023 04:28:49 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 6994B3858D33 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=gentoo.org Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=gentoo.org ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 6994B3858D33 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2001:470:ea4a:1:5054:ff:fec7:86e4 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1703305730; cv=none; b=c20hcV34vP+ow9s3ojh2Zl94ifPevcESgmCFCY1nUSZl+jyZFyLTUoqdQrJfCGD4cfhF+XFfowPCPnkU2QRXKaO72Cti59qRUVmrssVWqha+oCNSzjlkCcFU9MRDbFraW+du71uKczdGrccj8w5uUFM3v3NYku2t7LHecLbBFkI= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1703305730; c=relaxed/simple; bh=sqoCO1cFRze3aVbfWsXJkM/VHWWeY9iU01ER5e8EK3k=; h=From:To:Subject:Date:Message-ID:MIME-Version; b=BPoS6pej5NuYkj1F5kilXP4RVDq3gFgKOXUI+DZOyDeOWao2FyHsYwMpC9f6SHWA4pUX/LIRpKv+GJb2jsq/xrOd28E5uPhIzd0FDCkjA8swGrSfWm7mbr6FtMM11G7LAJV5FlhYG4+rG9kdTa1zCHooDRUKdiGMBoMYQiG4kSY= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by smtp.gentoo.org (Postfix, from userid 559) id C639B342FF8; Sat, 23 Dec 2023 04:28:48 +0000 (UTC) From: Mike Frysinger To: gdb-patches@sourceware.org Subject: [PATCH] sim: m32c: fix -Wshadow=local warnings Date: Fri, 22 Dec 2023 23:28:43 -0500 Message-ID: <20231223042843.9399-1-vapier@gentoo.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231222012355.7504-1-vapier@gentoo.org> References: <20231222012355.7504-1-vapier@gentoo.org> MIME-Version: 1.0 X-Spam-Status: No, score=-11.2 required=5.0 tests=BAYES_00, GIT_PATCH_0, JMQ_SPF_NEUTRAL, KAM_DMARC_STATUS, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb-patches@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gdb-patches-bounces+patchwork=sourceware.org@sourceware.org These decoders declare a lot of common variables for use by substeps, and then shadows a few because of how the opc generator is implemented. Easiest way around it is to rename the per-substep vars as needed as anything more would require substantial changes to the opc logic. --- sim/m32c/m32c.opc | 13 +++++-------- sim/m32c/r8c.opc | 8 ++++---- 2 files changed, 9 insertions(+), 12 deletions(-) diff --git a/sim/m32c/m32c.opc b/sim/m32c/m32c.opc index cc6ef9fbc576..02c894d216b0 100644 --- a/sim/m32c/m32c.opc +++ b/sim/m32c/m32c.opc @@ -728,11 +728,11 @@ next_opcode: b = get_bit2 (sc, bit); set_zc (!b, b); - /** 00bb 101b BTST:S src */ + /** 00bb 101bit BTST:S src */ sc = decode_src23 (3, 3, 1); /* bit,base:19 */ - b = get_bit2 (sc, bb*2 + b); - set_zc (!b, b); + bit = get_bit2 (sc, bb*2 + bit); + set_zc (!bit, bit); /** 1101 ddd0 dd10 0bit BTSTC dest */ @@ -1170,9 +1170,9 @@ next_opcode: NOTYET(); - /** 1101 0101 1110 1imm LDIPL #IMM */ + /** 1101 0101 1110 1flg LDIPL #IMM */ - set_flags (0x7000, imm*0x1000); + set_flags (0x7000, flg*0x1000); /** 0000 0001 1000 ddd w dd11 1111 MAX.size #IMM,dest */ @@ -1589,8 +1589,6 @@ next_opcode: /** 1010 111w PUSH.size #IMM */ - { - int a; prefix (0, 0, 0); imm = IMM(w+1); tprintf("push%s: %x\n", w ? "hi" : "qi", imm); @@ -1600,7 +1598,6 @@ next_opcode: else mem_put_qi (a, imm); put_reg (sp, a); - } /** 1100 sss w ss00 1110 PUSH.size src */ diff --git a/sim/m32c/r8c.opc b/sim/m32c/r8c.opc index c5d8929f6ab9..9c35e13f0c5d 100644 --- a/sim/m32c/r8c.opc +++ b/sim/m32c/r8c.opc @@ -880,9 +880,9 @@ decode_r8c (void) v = mem_get_qi (imm); put_dest (dc, v); - /** 0111 1101 1010 0imm LDIPL #IMM */ + /** 0111 1101 1010 0flg LDIPL #IMM */ - set_flags (0x700, imm*0x100); + set_flags (0x700, flg*0x100); /** 0111 010w 1100 dest MOV.size:G #IMM,dest */ @@ -1380,13 +1380,13 @@ decode_r8c (void) a = sign_ext (get_reg (r1h), 8); shift_op (dc, 0, a); - /** 0111 110w 1110 100b SMOVB.size */ + /** 0111 110w 1110 100z SMOVB.size */ { int count = get_reg (r3); int s1 = get_reg (a0) + (get_reg (r1h) << 16); int s2 = get_reg (a1); - int inc = (w ? 2 : 1) * (b ? -1 : 1); + int inc = (w ? 2 : 1) * (z ? -1 : 1); while (count) {