diff mbox series

[PATCH/committed,10/20] sim: frv: fix -Wimplicit-fallthrough warnings

Message ID 20231221070127.19142-10-vapier@gentoo.org
State New
Headers
Series [PATCH/committed,01/20] sim: signal: mark signal callback funcs as noreturn since they don't return |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_gdb_build--master-arm fail Patch failed to apply
linaro-tcwg-bot/tcwg_gdb_build--master-aarch64 fail Patch failed to apply

Commit Message

Mike Frysinger Dec. 21, 2023, 7:01 a.m. UTC 
  Replace some fall through comments with the attribute.
---
 sim/frv/cache.c      | 2 +-
 sim/frv/interrupts.c | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/sim/frv/cache.c b/sim/frv/cache.c
index c2beb39d3ef8..2d0fe5a590e9 100644
--- a/sim/frv/cache.c
+++ b/sim/frv/cache.c
@@ -136,7 +136,7 @@  frv_cache_reconfigure (SIM_CPU *current_cpu, FRV_CACHE *cache)
 	      break;
 	    }
 	}
-      /* fall through */
+      ATTRIBUTE_FALLTHROUGH;
     default:
       /* Set the cache to its original settings.  */
       cache->sets = cache->configured_sets;
diff --git a/sim/frv/interrupts.c b/sim/frv/interrupts.c
index baf058f18d4a..979360738bab 100644
--- a/sim/frv/interrupts.c
+++ b/sim/frv/interrupts.c
@@ -835,7 +835,7 @@  set_exception_status_registers (
 	{
 	case FRV_DIVISION_EXCEPTION:
 	  set_isr_exception_fields (current_cpu, item);
-	  /* fall thru to set reg_index.  */
+	  ATTRIBUTE_FALLTHROUGH;  /* To set reg_index.  */
 	case FRV_COMMIT_EXCEPTION:
 	  /* For fr550, always use ESR0.  */
 	  if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_fr550)
@@ -855,7 +855,7 @@  set_exception_status_registers (
 	  break;
 	case FRV_DATA_ACCESS_EXCEPTION:
 	  set_daec = 1;
-	  /* fall through */
+	  ATTRIBUTE_FALLTHROUGH;
 	case FRV_DATA_ACCESS_MMU_MISS:
 	case FRV_MEM_ADDRESS_NOT_ALIGNED:
 	  /* Get the appropriate ESR, EPCR, EAR and EDR.