Message ID | 20180928204114.20491-1-simon.marchi@ericsson.com |
---|---|
State | New, archived |
Headers |
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Commit Message
Simon Marchi
Sept. 28, 2018, 8:41 p.m. UTC
As reported by Jan here: https://sourceware.org/ml/gdb-patches/2018-09/msg00831.html the check that sets the number of available registers seems backwards. I can't test this patch however, since I don't have access to a cpu with AVX512. Could somebody perhaps from Intel, or somebody else that has access to such CPU, take a look? Alternatively, do you know if a machine in the GCC compile farm has this feature? I didn't find any, but maybe I didn't look enough. gdb/testsuite/ChangeLog: * gdb.arch/i386-avx512.exp: Fix setting of nr_regs based on is_amd64_regs_target. --- gdb/testsuite/gdb.arch/i386-avx512.exp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
Comments
Hello Simon, > As reported by Jan here: > > https://sourceware.org/ml/gdb-patches/2018-09/msg00831.html > > the check that sets the number of available registers seems backwards. > I can't test this patch however, since I don't have access to a cpu with AVX512. > Could somebody perhaps from Intel, or somebody else that has access to such > CPU, take a look? It indeed is backwards. The current test fails badly when run with -m32. > gdb/testsuite/ChangeLog: > > * gdb.arch/i386-avx512.exp: Fix setting of nr_regs based on > is_amd64_regs_target. > --- > gdb/testsuite/gdb.arch/i386-avx512.exp | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/gdb/testsuite/gdb.arch/i386-avx512.exp > b/gdb/testsuite/gdb.arch/i386-avx512.exp > index de2f62c3e1f..f27af534cfd 100644 > --- a/gdb/testsuite/gdb.arch/i386-avx512.exp > +++ b/gdb/testsuite/gdb.arch/i386-avx512.exp > @@ -93,9 +93,9 @@ gdb_test "break [gdb_get_line_number "third breakpoint > here"]" \ gdb_continue_to_breakpoint "continue to third breakpoint in main" > > if [is_amd64_regs_target] { > - set nr_regs 8 > -} else { > set nr_regs 32 > +} else { > + set nr_regs 8 > } > > for { set r 0 } { $r < $nr_regs } { incr r } { > -- > 2.19.0 With your patch, the test only fails for zmm registers due to broken XSAVE handling. This is fixed by Jan's patch. With both patches together, the test passes for -m32. Regards, Markus. Intel Deutschland GmbH Registered Address: Am Campeon 10-12, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Christin Eisenschmid, Christian Lamprechter Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928
On 2018-10-01 05:49, Metzger, Markus T wrote: > Hello Simon, > >> As reported by Jan here: >> >> https://sourceware.org/ml/gdb-patches/2018-09/msg00831.html >> >> the check that sets the number of available registers seems backwards. >> I can't test this patch however, since I don't have access to a cpu >> with AVX512. >> Could somebody perhaps from Intel, or somebody else that has access to >> such >> CPU, take a look? > > It indeed is backwards. > > The current test fails badly when run with -m32. > > >> gdb/testsuite/ChangeLog: >> >> * gdb.arch/i386-avx512.exp: Fix setting of nr_regs based on >> is_amd64_regs_target. >> --- >> gdb/testsuite/gdb.arch/i386-avx512.exp | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/gdb/testsuite/gdb.arch/i386-avx512.exp >> b/gdb/testsuite/gdb.arch/i386-avx512.exp >> index de2f62c3e1f..f27af534cfd 100644 >> --- a/gdb/testsuite/gdb.arch/i386-avx512.exp >> +++ b/gdb/testsuite/gdb.arch/i386-avx512.exp >> @@ -93,9 +93,9 @@ gdb_test "break [gdb_get_line_number "third >> breakpoint >> here"]" \ gdb_continue_to_breakpoint "continue to third breakpoint in >> main" >> >> if [is_amd64_regs_target] { >> - set nr_regs 8 >> -} else { >> set nr_regs 32 >> +} else { >> + set nr_regs 8 >> } >> >> for { set r 0 } { $r < $nr_regs } { incr r } { >> -- >> 2.19.0 > > With your patch, the test only fails for zmm registers due to broken > XSAVE > handling. This is fixed by Jan's patch. With both patches together, > the test > passes for -m32. Thanks a lot, I pushed it! Simon
diff --git a/gdb/testsuite/gdb.arch/i386-avx512.exp b/gdb/testsuite/gdb.arch/i386-avx512.exp index de2f62c3e1f..f27af534cfd 100644 --- a/gdb/testsuite/gdb.arch/i386-avx512.exp +++ b/gdb/testsuite/gdb.arch/i386-avx512.exp @@ -93,9 +93,9 @@ gdb_test "break [gdb_get_line_number "third breakpoint here"]" \ gdb_continue_to_breakpoint "continue to third breakpoint in main" if [is_amd64_regs_target] { - set nr_regs 8 -} else { set nr_regs 32 +} else { + set nr_regs 8 } for { set r 0 } { $r < $nr_regs } { incr r } {