diff mbox

[AArch64] Fix incorrect mask when decoding b.cond instruction

Message ID 1439818121-11050-1-git-send-email-pierre.langlois@arm.com
State New, archived
Headers

Commit Message

Pierre Langlois Aug. 17, 2015, 1:28 p.m. UTC 
  Hi all,

The encoding of the b.cond instruction is described in the architecture
reference manual as:

b.cond  0101 0100 iiii iiii iiii iiii iii0 cccc

So the mask should be 0xff000010.

Thanks,
Pierre

gdb/ChangeLog:

	* aarch64-tdep.c (decode_bcond): Fix incorrect mask.
---
 gdb/aarch64-tdep.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Yao Qi Aug. 19, 2015, 8:32 a.m. UTC | #1 
Pierre Langlois <pierre.langlois@arm.com> writes:

> The encoding of the b.cond instruction is described in the architecture
> reference manual as:
>
> b.cond  0101 0100 iiii iiii iiii iiii iii0 cccc
>
> So the mask should be 0xff000010.
>
> Thanks,
> Pierre
>
> gdb/ChangeLog:
>
> 	* aarch64-tdep.c (decode_bcond): Fix incorrect mask.

Patch looks right to me.
diff mbox

Patch

diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index c722dc5..e065378 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -339,7 +339,8 @@  decode_b (CORE_ADDR addr, uint32_t insn, int *is_bl, int32_t *offset)
 static int
 decode_bcond (CORE_ADDR addr, uint32_t insn, unsigned *cond, int32_t *offset)
 {
-  if (decode_masked_match (insn, 0xfe000000, 0x54000000))
+  /* b.cond  0101 0100 iiii iiii iiii iiii iii0 cccc */
+  if (decode_masked_match (insn, 0xff000010, 0x54000000))
     {
       *cond = (insn >> 0) & 0xf;
       *offset = extract_signed_bitfield (insn, 19, 5) << 2;