ppc: testsuite: float128-hw{,4}.c need -mlong-double-128 (was: [PATCH] ppc: testsuite: pr79004 needs -mlong-double-128)

Message ID or7d7flya8.fsf_-_@lxoliva.fsfla.org
State New
Headers
Series ppc: testsuite: float128-hw{,4}.c need -mlong-double-128 (was: [PATCH] ppc: testsuite: pr79004 needs -mlong-double-128) |

Commit Message

Alexandre Oliva April 23, 2022, 1:33 p.m. UTC
  On Apr 14, 2022, Alexandre Oliva <oliva@adacore.com> wrote:

> 	* gcc.target/powerpr/pr79004.c: Add -mlong-double-128.

Just like pr79004, float128-hw.c requires -mlong-double-128 for some
the expected asm opcodes to be output on target variants that have
64-bit long doubles.  That's because their expanders,
e.g. floatsi<mode>2 for FLOAT128 modes, are conditioned on
TARGET_LONG_DOUBLE_128, which is not set on target variants that use
64-bit long double.

float128-hw4.c doesn't even compile without -mlong-double-128, on
64-bit long double target variants.  The error is "invalid parameter
combination for AltiVec intrinsic" in get_float128_exponent,
get_float128_mantissa, and set_float128_exponent_float128, presumably
caused by rs6000_builtin_type_compatible's refusal to consider
_Float128 compatible when TARGET_LONG_DOUBLE_128 is not set.

Since these are compile tests, -mlong-double-128 doesn't hurt even on
target variants that use 64-bit long double, and enables both tests to
pass.

Tested on x86_64-linux-gnu x ppc64-vx7r2 with gcc-11.  Ok to install?


for  gcc/testsuite/ChangeLog

	* gcc.target/powerpc/float128-hw.c: Add -mlong-double-128.
	* gcc.target/powerpc/float128-hw4.c: Likewise.
---
 gcc/testsuite/gcc.target/powerpc/float128-hw.c  |    2 +-
 gcc/testsuite/gcc.target/powerpc/float128-hw4.c |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)
  

Comments

Segher Boessenkool April 26, 2022, 1:06 p.m. UTC | #1
Hi!

Please don't send patches as replies.

On Sat, Apr 23, 2022 at 10:33:35AM -0300, Alexandre Oliva wrote:
> On Apr 14, 2022, Alexandre Oliva <oliva@adacore.com> wrote:
> 
> > 	* gcc.target/powerpr/pr79004.c: Add -mlong-double-128.
> 
> Just like pr79004, float128-hw.c requires -mlong-double-128 for some
> the expected asm opcodes to be output on target variants that have
> 64-bit long doubles.  That's because their expanders,
> e.g. floatsi<mode>2 for FLOAT128 modes, are conditioned on
> TARGET_LONG_DOUBLE_128, which is not set on target variants that use
> 64-bit long double.
> 
> float128-hw4.c doesn't even compile without -mlong-double-128, on
> 64-bit long double target variants.  The error is "invalid parameter
> combination for AltiVec intrinsic" in get_float128_exponent,
> get_float128_mantissa, and set_float128_exponent_float128, presumably
> caused by rs6000_builtin_type_compatible's refusal to consider
> _Float128 compatible when TARGET_LONG_DOUBLE_128 is not set.
> 
> Since these are compile tests, -mlong-double-128 doesn't hurt even on
> target variants that use 64-bit long double, and enables both tests to
> pass.

This is not okay, sorry.  The testcase uses _Float128, what code that
generates should not depend on your long double setting.  Please file
a PR instead?


Segher
  
Alexandre Oliva April 26, 2022, 4:49 p.m. UTC | #2
On Apr 26, 2022, Segher Boessenkool <segher@kernel.crashing.org> wrote:

> The testcase uses _Float128, what code that
> generates should not depend on your long double setting.

Good, that means my hunch that it shouldn't is on the right track.

> Please file a PR instead?

I filed https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105359 the other
day, how does that look?
  

Patch

diff --git a/gcc/testsuite/gcc.target/powerpc/float128-hw.c b/gcc/testsuite/gcc.target/powerpc/float128-hw.c
index 8c9beafa90ad0..284d744c00978 100644
--- a/gcc/testsuite/gcc.target/powerpc/float128-hw.c
+++ b/gcc/testsuite/gcc.target/powerpc/float128-hw.c
@@ -1,7 +1,7 @@ 
 /* { dg-do compile { target lp64 } } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-require-effective-target float128 } */
-/* { dg-options "-mpower9-vector -O2" } */
+/* { dg-options "-mpower9-vector -O2 -mlong-double-128" } */
 
 #ifndef TYPE
 #define TYPE _Float128
diff --git a/gcc/testsuite/gcc.target/powerpc/float128-hw4.c b/gcc/testsuite/gcc.target/powerpc/float128-hw4.c
index fc149169bc632..d86eadbcc7d06 100644
--- a/gcc/testsuite/gcc.target/powerpc/float128-hw4.c
+++ b/gcc/testsuite/gcc.target/powerpc/float128-hw4.c
@@ -1,7 +1,7 @@ 
 /* { dg-do compile { target lp64 } } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-require-effective-target float128 } */
-/* { dg-options "-mpower9-vector -O2 -mabi=ieeelongdouble -Wno-psabi" } */
+/* { dg-options "-mpower9-vector -O2 -mlong-double-128 -mabi=ieeelongdouble -Wno-psabi" } */
 
 /* Insure that the ISA 3.0 IEEE 128-bit floating point built-in functions can
    be used with long double when the default is IEEE 128-bit.  */