diff mbox series

[1/3] omp-simd-clone: Allow fixed-lane vectors

Message ID c031829e4f5b025e3ebfb15616f9667661c11365.1660051134.git.ams@codesourcery.com
State Committed
Headers
Series OpenMP SIMD routines |

Commit Message

Andrew Stubbs Aug. 9, 2022, 1:23 p.m. UTC 
  The vecsize_int/vecsize_float has an assumption that all arguments will use
the same bitsize, and vary the number of lanes according to the element size,
but this is inappropriate on targets where the number of lanes is fixed and
the bitsize varies (i.e. amdgcn).

With this change the vecsize can be left zero and the vectorization factor will
be the same for all types.

gcc/ChangeLog:

	* doc/tm.texi: Regenerate.
	* omp-simd-clone.cc (simd_clone_adjust_return_type): Allow zero
	vecsize.
	(simd_clone_adjust_argument_types): Likewise.
	* target.def (compute_vecsize_and_simdlen): Document the new
	vecsize_int and vecsize_float semantics.
---
 gcc/doc/tm.texi       |  3 +++
 gcc/omp-simd-clone.cc | 20 +++++++++++++++-----
 gcc/target.def        |  3 +++
 3 files changed, 21 insertions(+), 5 deletions(-)

Comments

Jakub Jelinek Aug. 26, 2022, 11:04 a.m. UTC | #1 
On Tue, Aug 09, 2022 at 02:23:48PM +0100, Andrew Stubbs wrote:
> 
> The vecsize_int/vecsize_float has an assumption that all arguments will use
> the same bitsize, and vary the number of lanes according to the element size,
> but this is inappropriate on targets where the number of lanes is fixed and
> the bitsize varies (i.e. amdgcn).
> 
> With this change the vecsize can be left zero and the vectorization factor will
> be the same for all types.
> 
> gcc/ChangeLog:
> 
> 	* doc/tm.texi: Regenerate.
> 	* omp-simd-clone.cc (simd_clone_adjust_return_type): Allow zero
> 	vecsize.
> 	(simd_clone_adjust_argument_types): Likewise.
> 	* target.def (compute_vecsize_and_simdlen): Document the new
> 	vecsize_int and vecsize_float semantics.

LGTM, except for a formatting nit.

> @@ -618,8 +621,12 @@ simd_clone_adjust_argument_types (struct cgraph_node *node)
>  	    veclen = sc->vecsize_int;
>  	  else
>  	    veclen = sc->vecsize_float;
> -	  veclen = exact_div (veclen,
> -			      GET_MODE_BITSIZE (SCALAR_TYPE_MODE (parm_type)));
> +	  if (known_eq (veclen, 0))
> +	    veclen = sc->simdlen;
> +	  else
> +	    veclen = exact_div (veclen,
> +				GET_MODE_BITSIZE
> +				(SCALAR_TYPE_MODE (parm_type)));

Macro name on one line and ( on another is too ugly, can you please use:
	    veclen
	      = exact_div (veclen,
			   GET_MODE_BITSIZE (SCALAR_TYPE_MODE (parm_type)));
or:
	    {
	      scalar_mode m = SCALAR_TYPE_MODE (parm_type);
	      veclen = exact_div (veclen, GET_MODE_BITSIZE (m));
	    }
?

	Jakub
Andrew Stubbs Aug. 30, 2022, 2:52 p.m. UTC | #2 
On 26/08/2022 12:04, Jakub Jelinek wrote:
>> gcc/ChangeLog:
>>
>> 	* doc/tm.texi: Regenerate.
>> 	* omp-simd-clone.cc (simd_clone_adjust_return_type): Allow zero
>> 	vecsize.
>> 	(simd_clone_adjust_argument_types): Likewise.
>> 	* target.def (compute_vecsize_and_simdlen): Document the new
>> 	vecsize_int and vecsize_float semantics.
> 
> LGTM, except for a formatting nit.

Here's what I pushed.

Andrew
omp-simd-clone: Allow fixed-lane vectors

The vecsize_int/vecsize_float has an assumption that all arguments will use
the same bitsize, and vary the number of lanes according to the element size,
but this is inappropriate on targets where the number of lanes is fixed and
the bitsize varies (i.e. amdgcn).

With this change the vecsize can be left zero and the vectorization factor will
be the same for all types.

gcc/ChangeLog:

	* doc/tm.texi: Regenerate.
	* omp-simd-clone.cc (simd_clone_adjust_return_type): Allow zero
	vecsize.
	(simd_clone_adjust_argument_types): Likewise.
	* target.def (compute_vecsize_and_simdlen): Document the new
	vecsize_int and vecsize_float semantics.

diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 92bda1a7e14..c3001c6ded9 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -6253,6 +6253,9 @@ stores.
 This hook should set @var{vecsize_mangle}, @var{vecsize_int}, @var{vecsize_float}
 fields in @var{simd_clone} structure pointed by @var{clone_info} argument and also
 @var{simdlen} field if it was previously 0.
+@var{vecsize_mangle} is a marker for the backend only. @var{vecsize_int} and
+@var{vecsize_float} should be left zero on targets where the number of lanes is
+not determined by the bitsize (in which case @var{simdlen} is always used).
 The hook should return 0 if SIMD clones shouldn't be emitted,
 or number of @var{vecsize_mangle} variants that should be emitted.
 @end deftypefn
diff --git a/gcc/omp-simd-clone.cc b/gcc/omp-simd-clone.cc
index 58bd68b129b..68ee4c2c3b0 100644
--- a/gcc/omp-simd-clone.cc
+++ b/gcc/omp-simd-clone.cc
@@ -504,7 +504,10 @@ simd_clone_adjust_return_type (struct cgraph_node *node)
     veclen = node->simdclone->vecsize_int;
   else
     veclen = node->simdclone->vecsize_float;
-  veclen = exact_div (veclen, GET_MODE_BITSIZE (SCALAR_TYPE_MODE (t)));
+  if (known_eq (veclen, 0))
+    veclen = node->simdclone->simdlen;
+  else
+    veclen = exact_div (veclen, GET_MODE_BITSIZE (SCALAR_TYPE_MODE (t)));
   if (multiple_p (veclen, node->simdclone->simdlen))
     veclen = node->simdclone->simdlen;
   if (POINTER_TYPE_P (t))
@@ -618,8 +621,12 @@ simd_clone_adjust_argument_types (struct cgraph_node *node)
 	    veclen = sc->vecsize_int;
 	  else
 	    veclen = sc->vecsize_float;
-	  veclen = exact_div (veclen,
-			      GET_MODE_BITSIZE (SCALAR_TYPE_MODE (parm_type)));
+	  if (known_eq (veclen, 0))
+	    veclen = sc->simdlen;
+	  else
+	    veclen
+	      = exact_div (veclen,
+			   GET_MODE_BITSIZE (SCALAR_TYPE_MODE (parm_type)));
 	  if (multiple_p (veclen, sc->simdlen))
 	    veclen = sc->simdlen;
 	  adj.op = IPA_PARAM_OP_NEW;
@@ -669,8 +676,11 @@ simd_clone_adjust_argument_types (struct cgraph_node *node)
 	veclen = sc->vecsize_int;
       else
 	veclen = sc->vecsize_float;
-      veclen = exact_div (veclen,
-			  GET_MODE_BITSIZE (SCALAR_TYPE_MODE (base_type)));
+      if (known_eq (veclen, 0))
+	veclen = sc->simdlen;
+      else
+	veclen = exact_div (veclen,
+			    GET_MODE_BITSIZE (SCALAR_TYPE_MODE (base_type)));
       if (multiple_p (veclen, sc->simdlen))
 	veclen = sc->simdlen;
       if (sc->mask_mode != VOIDmode)
diff --git a/gcc/target.def b/gcc/target.def
index 2a7fa68f83d..4d49ffc2c88 100644
--- a/gcc/target.def
+++ b/gcc/target.def
@@ -1629,6 +1629,9 @@ DEFHOOK
 "This hook should set @var{vecsize_mangle}, @var{vecsize_int}, @var{vecsize_float}\n\
 fields in @var{simd_clone} structure pointed by @var{clone_info} argument and also\n\
 @var{simdlen} field if it was previously 0.\n\
+@var{vecsize_mangle} is a marker for the backend only. @var{vecsize_int} and\n\
+@var{vecsize_float} should be left zero on targets where the number of lanes is\n\
+not determined by the bitsize (in which case @var{simdlen} is always used).\n\
 The hook should return 0 if SIMD clones shouldn't be emitted,\n\
 or number of @var{vecsize_mangle} variants that should be emitted.",
 int, (struct cgraph_node *, struct cgraph_simd_clone *, tree, int), NULL)
Rainer Orth Aug. 30, 2022, 4:54 p.m. UTC | #3 
Hi Andrew,

> On 26/08/2022 12:04, Jakub Jelinek wrote:
>>> gcc/ChangeLog:
>>>
>>> 	* doc/tm.texi: Regenerate.
>>> 	* omp-simd-clone.cc (simd_clone_adjust_return_type): Allow zero
>>> 	vecsize.
>>> 	(simd_clone_adjust_argument_types): Likewise.
>>> 	* target.def (compute_vecsize_and_simdlen): Document the new
>>> 	vecsize_int and vecsize_float semantics.
>> LGTM, except for a formatting nit.
> diff --git a/gcc/omp-simd-clone.cc b/gcc/omp-simd-clone.cc
> index 58bd68b129b..68ee4c2c3b0 100644
> --- a/gcc/omp-simd-clone.cc
> +++ b/gcc/omp-simd-clone.cc
> @@ -504,7 +504,10 @@ simd_clone_adjust_return_type (struct cgraph_node *node)
>      veclen = node->simdclone->vecsize_int;
>    else
>      veclen = node->simdclone->vecsize_float;
> -  veclen = exact_div (veclen, GET_MODE_BITSIZE (SCALAR_TYPE_MODE (t)));
> +  if (known_eq (veclen, 0))
> +    veclen = node->simdclone->simdlen;
> +  else
> +    veclen = exact_div (veclen, GET_MODE_BITSIZE (SCALAR_TYPE_MODE (t)));
>    if (multiple_p (veclen, node->simdclone->simdlen))
>      veclen = node->simdclone->simdlen;
>    if (POINTER_TYPE_P (t))

this broke bootstrap on (at least) i386-pc-solaris2.11 and
sparc-sun-solaris2.11:

In file included from /vol/gcc/src/hg/master/local/gcc/coretypes.h:475,
                 from /vol/gcc/src/hg/master/local/gcc/omp-simd-clone.cc:23:
/vol/gcc/src/hg/master/local/gcc/poly-int.h: In instantiation of 'typename if_nonpoly<Cb, bool>::type maybe_ne(const poly_int_pod<N, C>&, const Cb&) [with unsigned int N = 1; Ca = long long unsigned int; Cb = int; typename if_nonpoly<Cb, bool>::type = bool]':
/vol/gcc/src/hg/master/local/gcc/omp-simd-clone.cc:507:7:   required from here
/vol/gcc/src/hg/master/local/gcc/poly-int.h:1295:22: error: comparison of integer expressions of different signedness: 'const long long unsigned int' and 'const int' [-Werror=sign-compare]
 1295 |   return a.coeffs[0] != b;
      |          ~~~~~~~~~~~~^~~~

Changing the three instances of 0 to 0U seems to fix this.

	Rainer
Martin Liška Aug. 31, 2022, 7:11 a.m. UTC | #4 
On 8/30/22 18:54, Rainer Orth wrote:
> Hi Andrew,
> 
>> On 26/08/2022 12:04, Jakub Jelinek wrote:
>>>> gcc/ChangeLog:
>>>>
>>>> 	* doc/tm.texi: Regenerate.
>>>> 	* omp-simd-clone.cc (simd_clone_adjust_return_type): Allow zero
>>>> 	vecsize.
>>>> 	(simd_clone_adjust_argument_types): Likewise.
>>>> 	* target.def (compute_vecsize_and_simdlen): Document the new
>>>> 	vecsize_int and vecsize_float semantics.
>>> LGTM, except for a formatting nit.
>> diff --git a/gcc/omp-simd-clone.cc b/gcc/omp-simd-clone.cc
>> index 58bd68b129b..68ee4c2c3b0 100644
>> --- a/gcc/omp-simd-clone.cc
>> +++ b/gcc/omp-simd-clone.cc
>> @@ -504,7 +504,10 @@ simd_clone_adjust_return_type (struct cgraph_node *node)
>>      veclen = node->simdclone->vecsize_int;
>>    else
>>      veclen = node->simdclone->vecsize_float;
>> -  veclen = exact_div (veclen, GET_MODE_BITSIZE (SCALAR_TYPE_MODE (t)));
>> +  if (known_eq (veclen, 0))
>> +    veclen = node->simdclone->simdlen;
>> +  else
>> +    veclen = exact_div (veclen, GET_MODE_BITSIZE (SCALAR_TYPE_MODE (t)));
>>    if (multiple_p (veclen, node->simdclone->simdlen))
>>      veclen = node->simdclone->simdlen;
>>    if (POINTER_TYPE_P (t))
> 
> this broke bootstrap on (at least) i386-pc-solaris2.11 and
> sparc-sun-solaris2.11:
> 
> In file included from /vol/gcc/src/hg/master/local/gcc/coretypes.h:475,
>                  from /vol/gcc/src/hg/master/local/gcc/omp-simd-clone.cc:23:
> /vol/gcc/src/hg/master/local/gcc/poly-int.h: In instantiation of 'typename if_nonpoly<Cb, bool>::type maybe_ne(const poly_int_pod<N, C>&, const Cb&) [with unsigned int N = 1; Ca = long long unsigned int; Cb = int; typename if_nonpoly<Cb, bool>::type = bool]':
> /vol/gcc/src/hg/master/local/gcc/omp-simd-clone.cc:507:7:   required from here
> /vol/gcc/src/hg/master/local/gcc/poly-int.h:1295:22: error: comparison of integer expressions of different signedness: 'const long long unsigned int' and 'const int' [-Werror=sign-compare]
>  1295 |   return a.coeffs[0] != b;
>       |          ~~~~~~~~~~~~^~~~

I noticed the very same warning on x86_64-linux-gnu as well.

Cheers,
Martin

> 
> Changing the three instances of 0 to 0U seems to fix this.
> 
> 	Rainer
>
Jakub Jelinek Aug. 31, 2022, 8:29 a.m. UTC | #5 
On Tue, Aug 30, 2022 at 06:54:49PM +0200, Rainer Orth wrote:
> > --- a/gcc/omp-simd-clone.cc
> > +++ b/gcc/omp-simd-clone.cc
> > @@ -504,7 +504,10 @@ simd_clone_adjust_return_type (struct cgraph_node *node)
> >      veclen = node->simdclone->vecsize_int;
> >    else
> >      veclen = node->simdclone->vecsize_float;
> > -  veclen = exact_div (veclen, GET_MODE_BITSIZE (SCALAR_TYPE_MODE (t)));
> > +  if (known_eq (veclen, 0))
> > +    veclen = node->simdclone->simdlen;
> > +  else
> > +    veclen = exact_div (veclen, GET_MODE_BITSIZE (SCALAR_TYPE_MODE (t)));
> >    if (multiple_p (veclen, node->simdclone->simdlen))
> >      veclen = node->simdclone->simdlen;
> >    if (POINTER_TYPE_P (t))
> 
> this broke bootstrap on (at least) i386-pc-solaris2.11 and
> sparc-sun-solaris2.11:
> 
> In file included from /vol/gcc/src/hg/master/local/gcc/coretypes.h:475,
>                  from /vol/gcc/src/hg/master/local/gcc/omp-simd-clone.cc:23:
> /vol/gcc/src/hg/master/local/gcc/poly-int.h: In instantiation of 'typename if_nonpoly<Cb, bool>::type maybe_ne(const poly_int_pod<N, C>&, const Cb&) [with unsigned int N = 1; Ca = long long unsigned int; Cb = int; typename if_nonpoly<Cb, bool>::type = bool]':
> /vol/gcc/src/hg/master/local/gcc/omp-simd-clone.cc:507:7:   required from here
> /vol/gcc/src/hg/master/local/gcc/poly-int.h:1295:22: error: comparison of integer expressions of different signedness: 'const long long unsigned int' and 'const int' [-Werror=sign-compare]
>  1295 |   return a.coeffs[0] != b;
>       |          ~~~~~~~~~~~~^~~~
> 
> Changing the three instances of 0 to 0U seems to fix this.

It broke bootstrap for me on x86_64-linux and i686-linux too.

I've bootstrapped/regtested the following patch on both overnight
and committed to unbreak bootstrap for others.

2022-08-31  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
	    Jakub Jelinek  <jakub@redhat.com>

	* omp-simd-clone.cc (simd_clone_adjust_return_type,
	simd_clone_adjust_argument_types): Use known_eq (veclen, 0U)
	instead of known_eq (veclen, 0) to avoid -Wsign-compare warnings.

--- gcc/omp-simd-clone.cc.jj	2022-08-30 23:10:02.054456930 +0200
+++ gcc/omp-simd-clone.cc	2022-08-30 23:51:03.601664615 +0200
@@ -504,7 +504,7 @@ simd_clone_adjust_return_type (struct cg
     veclen = node->simdclone->vecsize_int;
   else
     veclen = node->simdclone->vecsize_float;
-  if (known_eq (veclen, 0))
+  if (known_eq (veclen, 0U))
     veclen = node->simdclone->simdlen;
   else
     veclen = exact_div (veclen, GET_MODE_BITSIZE (SCALAR_TYPE_MODE (t)));
@@ -621,7 +621,7 @@ simd_clone_adjust_argument_types (struct
 	    veclen = sc->vecsize_int;
 	  else
 	    veclen = sc->vecsize_float;
-	  if (known_eq (veclen, 0))
+	  if (known_eq (veclen, 0U))
 	    veclen = sc->simdlen;
 	  else
 	    veclen
@@ -676,7 +676,7 @@ simd_clone_adjust_argument_types (struct
 	veclen = sc->vecsize_int;
       else
 	veclen = sc->vecsize_float;
-      if (known_eq (veclen, 0))
+      if (known_eq (veclen, 0U))
 	veclen = sc->simdlen;
       else
 	veclen = exact_div (veclen,


	Jakub
Andrew Stubbs Aug. 31, 2022, 8:35 a.m. UTC | #6 
On 31/08/2022 09:29, Jakub Jelinek wrote:
> On Tue, Aug 30, 2022 at 06:54:49PM +0200, Rainer Orth wrote:
>>> --- a/gcc/omp-simd-clone.cc
>>> +++ b/gcc/omp-simd-clone.cc
>>> @@ -504,7 +504,10 @@ simd_clone_adjust_return_type (struct cgraph_node *node)
>>>       veclen = node->simdclone->vecsize_int;
>>>     else
>>>       veclen = node->simdclone->vecsize_float;
>>> -  veclen = exact_div (veclen, GET_MODE_BITSIZE (SCALAR_TYPE_MODE (t)));
>>> +  if (known_eq (veclen, 0))
>>> +    veclen = node->simdclone->simdlen;
>>> +  else
>>> +    veclen = exact_div (veclen, GET_MODE_BITSIZE (SCALAR_TYPE_MODE (t)));
>>>     if (multiple_p (veclen, node->simdclone->simdlen))
>>>       veclen = node->simdclone->simdlen;
>>>     if (POINTER_TYPE_P (t))
>>
>> this broke bootstrap on (at least) i386-pc-solaris2.11 and
>> sparc-sun-solaris2.11:
>>
>> In file included from /vol/gcc/src/hg/master/local/gcc/coretypes.h:475,
>>                   from /vol/gcc/src/hg/master/local/gcc/omp-simd-clone.cc:23:
>> /vol/gcc/src/hg/master/local/gcc/poly-int.h: In instantiation of 'typename if_nonpoly<Cb, bool>::type maybe_ne(const poly_int_pod<N, C>&, const Cb&) [with unsigned int N = 1; Ca = long long unsigned int; Cb = int; typename if_nonpoly<Cb, bool>::type = bool]':
>> /vol/gcc/src/hg/master/local/gcc/omp-simd-clone.cc:507:7:   required from here
>> /vol/gcc/src/hg/master/local/gcc/poly-int.h:1295:22: error: comparison of integer expressions of different signedness: 'const long long unsigned int' and 'const int' [-Werror=sign-compare]
>>   1295 |   return a.coeffs[0] != b;
>>        |          ~~~~~~~~~~~~^~~~
>>
>> Changing the three instances of 0 to 0U seems to fix this.
> 
> It broke bootstrap for me on x86_64-linux and i686-linux too.
> 
> I've bootstrapped/regtested the following patch on both overnight
> and committed to unbreak bootstrap for others.

Apologies everyone. :-(

I did a full build and test on x86_64, but not a bootstrap, and 
apparently it was fine with my not-so-new compiler.

Andrew
diff mbox series

Patch

diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 92bda1a7e14..c3001c6ded9 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -6253,6 +6253,9 @@  stores.
 This hook should set @var{vecsize_mangle}, @var{vecsize_int}, @var{vecsize_float}
 fields in @var{simd_clone} structure pointed by @var{clone_info} argument and also
 @var{simdlen} field if it was previously 0.
+@var{vecsize_mangle} is a marker for the backend only. @var{vecsize_int} and
+@var{vecsize_float} should be left zero on targets where the number of lanes is
+not determined by the bitsize (in which case @var{simdlen} is always used).
 The hook should return 0 if SIMD clones shouldn't be emitted,
 or number of @var{vecsize_mangle} variants that should be emitted.
 @end deftypefn
diff --git a/gcc/omp-simd-clone.cc b/gcc/omp-simd-clone.cc
index 58bd68b129b..258d3c6377f 100644
--- a/gcc/omp-simd-clone.cc
+++ b/gcc/omp-simd-clone.cc
@@ -504,7 +504,10 @@  simd_clone_adjust_return_type (struct cgraph_node *node)
     veclen = node->simdclone->vecsize_int;
   else
     veclen = node->simdclone->vecsize_float;
-  veclen = exact_div (veclen, GET_MODE_BITSIZE (SCALAR_TYPE_MODE (t)));
+  if (known_eq (veclen, 0))
+    veclen = node->simdclone->simdlen;
+  else
+    veclen = exact_div (veclen, GET_MODE_BITSIZE (SCALAR_TYPE_MODE (t)));
   if (multiple_p (veclen, node->simdclone->simdlen))
     veclen = node->simdclone->simdlen;
   if (POINTER_TYPE_P (t))
@@ -618,8 +621,12 @@  simd_clone_adjust_argument_types (struct cgraph_node *node)
 	    veclen = sc->vecsize_int;
 	  else
 	    veclen = sc->vecsize_float;
-	  veclen = exact_div (veclen,
-			      GET_MODE_BITSIZE (SCALAR_TYPE_MODE (parm_type)));
+	  if (known_eq (veclen, 0))
+	    veclen = sc->simdlen;
+	  else
+	    veclen = exact_div (veclen,
+				GET_MODE_BITSIZE
+				(SCALAR_TYPE_MODE (parm_type)));
 	  if (multiple_p (veclen, sc->simdlen))
 	    veclen = sc->simdlen;
 	  adj.op = IPA_PARAM_OP_NEW;
@@ -669,8 +676,11 @@  simd_clone_adjust_argument_types (struct cgraph_node *node)
 	veclen = sc->vecsize_int;
       else
 	veclen = sc->vecsize_float;
-      veclen = exact_div (veclen,
-			  GET_MODE_BITSIZE (SCALAR_TYPE_MODE (base_type)));
+      if (known_eq (veclen, 0))
+	veclen = sc->simdlen;
+      else
+	veclen = exact_div (veclen,
+			    GET_MODE_BITSIZE (SCALAR_TYPE_MODE (base_type)));
       if (multiple_p (veclen, sc->simdlen))
 	veclen = sc->simdlen;
       if (sc->mask_mode != VOIDmode)
diff --git a/gcc/target.def b/gcc/target.def
index 2a7fa68f83d..4d49ffc2c88 100644
--- a/gcc/target.def
+++ b/gcc/target.def
@@ -1629,6 +1629,9 @@  DEFHOOK
 "This hook should set @var{vecsize_mangle}, @var{vecsize_int}, @var{vecsize_float}\n\
 fields in @var{simd_clone} structure pointed by @var{clone_info} argument and also\n\
 @var{simdlen} field if it was previously 0.\n\
+@var{vecsize_mangle} is a marker for the backend only. @var{vecsize_int} and\n\
+@var{vecsize_float} should be left zero on targets where the number of lanes is\n\
+not determined by the bitsize (in which case @var{simdlen} is always used).\n\
 The hook should return 0 if SIMD clones shouldn't be emitted,\n\
 or number of @var{vecsize_mangle} variants that should be emitted.",
 int, (struct cgraph_node *, struct cgraph_simd_clone *, tree, int), NULL)