rs6000: Update instruction counts due to combine changes [PR112103]
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| linaro-tcwg-bot/tcwg_gcc_build--master-arm |
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| linaro-tcwg-bot/tcwg_gcc_check--master-aarch64 |
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| linaro-tcwg-bot/tcwg_gcc_check--master-arm |
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Commit Message
rs6000: Update instruction counts due to combine changes [PR112103]
The PR91865 combine fix changed instruction counts slightly for rlwinm-0.c.
Adjust expected instruction counts accordingly.
This passed on both powerpc64le-linux and powerpc64-linux running the
testsuite in both 32-bit and 64-bit modes. Ok for trunk?
FYI, I will open a new bug to track the removing of the superfluous
insns detected in PR112103.
Peter
gcc/testsuite/
PR target/112103
* gcc.target/powerpc/rlwinm-0.c: Adjust expected instruction counts.
Comments
Hi Peter,
on 2024/2/20 06:35, Peter Bergner wrote:
> rs6000: Update instruction counts due to combine changes [PR112103]
>
> The PR91865 combine fix changed instruction counts slightly for rlwinm-0.c.
> Adjust expected instruction counts accordingly.
>
> This passed on both powerpc64le-linux and powerpc64-linux running the
> testsuite in both 32-bit and 64-bit modes. Ok for trunk?
OK for trunk, thanks for fixing!
>
> FYI, I will open a new bug to track the removing of the superfluous
> insns detected in PR112103.
Hope this test case will become not fragile any more once this filed
issue gets fixed. :)
BR,
Kewen
>
>
> Peter
>
>
> gcc/testsuite/
> PR target/112103
> * gcc.target/powerpc/rlwinm-0.c: Adjust expected instruction counts.
>
> diff --git a/gcc/testsuite/gcc.target/powerpc/rlwinm-0.c b/gcc/testsuite/gcc.target/powerpc/rlwinm-0.c
> index 4f4fca2d8ef..a10d9174306 100644
> --- a/gcc/testsuite/gcc.target/powerpc/rlwinm-0.c
> +++ b/gcc/testsuite/gcc.target/powerpc/rlwinm-0.c
> @@ -4,10 +4,10 @@
> /* { dg-final { scan-assembler-times {(?n)^\s+[a-z]} 6739 { target ilp32 } } } */
> /* { dg-final { scan-assembler-times {(?n)^\s+[a-z]} 9716 { target lp64 } } } */
> /* { dg-final { scan-assembler-times {(?n)^\s+blr} 3375 } } */
> -/* { dg-final { scan-assembler-times {(?n)^\s+rldicl} 3081 { target lp64 } } } */
> +/* { dg-final { scan-assembler-times {(?n)^\s+rldicl} 3090 { target lp64 } } } */
>
> /* { dg-final { scan-assembler-times {(?n)^\s+rlwinm} 3197 { target ilp32 } } } */
> -/* { dg-final { scan-assembler-times {(?n)^\s+rlwinm} 3093 { target lp64 } } } */
> +/* { dg-final { scan-assembler-times {(?n)^\s+rlwinm} 3084 { target lp64 } } } */
> /* { dg-final { scan-assembler-times {(?n)^\s+rotlwi} 154 } } */
> /* { dg-final { scan-assembler-times {(?n)^\s+srwi} 13 { target ilp32 } } } */
> /* { dg-final { scan-assembler-times {(?n)^\s+srdi} 13 { target lp64 } } } */
On 2/20/24 3:29 AM, Kewen.Lin wrote:
> on 2024/2/20 06:35, Peter Bergner wrote:
>> rs6000: Update instruction counts due to combine changes [PR112103]
>>
>> The PR91865 combine fix changed instruction counts slightly for rlwinm-0.c.
>> Adjust expected instruction counts accordingly.
>>
>> This passed on both powerpc64le-linux and powerpc64-linux running the
>> testsuite in both 32-bit and 64-bit modes. Ok for trunk?
>
> OK for trunk, thanks for fixing!
Ok, pushed. Thanks.
>> FYI, I will open a new bug to track the removing of the superfluous
>> insns detected in PR112103.
>
> Hope this test case will become not fragile any more once this filed
> issue gets fixed. :)
I think this will become less fragile after we fix PR114004 which is
the bug I opened to track fixing the superfluous insn that was emitted
that we found in this bug. The fragility was due to the superfluous
insn being different before and after Roger's patch. Once we don't
emit it anymore, this test case should be less fragile.
Peter
On Tue, Feb 20, 2024 at 01:49:30PM -0600, Peter Bergner wrote:
> I think this will become less fragile after we fix PR114004 which is
You call it "fragile". I call it the testcase found the exact kind of
bug this testcase was meant to find!
Yes, the test should become quieter when the compiler has fewer bugs :-)
Segher
@@ -4,10 +4,10 @@
/* { dg-final { scan-assembler-times {(?n)^\s+[a-z]} 6739 { target ilp32 } } } */
/* { dg-final { scan-assembler-times {(?n)^\s+[a-z]} 9716 { target lp64 } } } */
/* { dg-final { scan-assembler-times {(?n)^\s+blr} 3375 } } */
-/* { dg-final { scan-assembler-times {(?n)^\s+rldicl} 3081 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {(?n)^\s+rldicl} 3090 { target lp64 } } } */
/* { dg-final { scan-assembler-times {(?n)^\s+rlwinm} 3197 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times {(?n)^\s+rlwinm} 3093 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {(?n)^\s+rlwinm} 3084 { target lp64 } } } */
/* { dg-final { scan-assembler-times {(?n)^\s+rotlwi} 154 } } */
/* { dg-final { scan-assembler-times {(?n)^\s+srwi} 13 { target ilp32 } } } */
/* { dg-final { scan-assembler-times {(?n)^\s+srdi} 13 { target lp64 } } } */