[PATCH-2,rs6000] Implement optab_isfinite for SFmode, DFmode and TFmode [PR97786]
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Commit Message
Hi,
This patch implemented optab_finite for SF/DF/TFmode by rs6000 test
data class instructions.
This patch relies on former patch which adds optab_finite.
https://gcc.gnu.org/pipermail/gcc-patches/2024-April/649339.html
Bootstrapped and tested on powerpc64-linux BE and LE with no
regressions. Is it OK for next stage 1?
Thanks
Gui Haochen
ChangeLog
rs6000: Implement optab_isfinite for SFmode, DFmode and TFmode
gcc/
PR target/97786
* config/rs6000/vsx.md (isfinite<mode>2): New expand for SFmode and
DFmode.
(isfinite<mode>2): New expand for TFmode.
gcc/testsuite/
PR target/97786
* gcc.target/powerpc/pr97786-4.c: New test.
* gcc.target/powerpc/pr97786-5.c: New test.
patch.diff
@@ -5333,6 +5333,31 @@ (define_expand "isinf<mode>2"
DONE;
})
+(define_expand "isfinite<mode>2"
+ [(use (match_operand:SI 0 "gpc_reg_operand"))
+ (use (match_operand:SFDF 1 "gpc_reg_operand"))]
+ "TARGET_HARD_FLOAT
+ && TARGET_P9_VECTOR"
+{
+ rtx tmp = can_create_pseudo_p () ? gen_reg_rtx (SImode) : operands[0];
+ emit_insn (gen_xststdc<sd>p (tmp, operands[1], GEN_INT (0x70)));
+ emit_insn (gen_xorsi3 (operands[0], tmp, const1_rtx));
+ DONE;
+})
+
+(define_expand "isfinite<mode>2"
+ [(use (match_operand:SI 0 "gpc_reg_operand"))
+ (use (match_operand:IEEE128 1 "gpc_reg_operand"))]
+ "TARGET_HARD_FLOAT
+ && TARGET_P9_VECTOR"
+{
+ rtx tmp = can_create_pseudo_p () ? gen_reg_rtx (SImode) : operands[0];
+ emit_insn (gen_xststdcqp_<mode> (tmp, operands[1], GEN_INT (0x70)));
+ emit_insn (gen_xorsi3 (operands[0], tmp, const1_rtx));
+ DONE;
+})
+
+
;; The VSX Scalar Test Negative Quad-Precision
(define_expand "xststdcnegqp_<mode>"
[(set (match_dup 2)
new file mode 100644
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-O2 -mdejagnu-cpu=power9 -mvsx" } */
+
+int test1 (double x)
+{
+ return __builtin_isfinite (x);
+}
+
+int test2 (float x)
+{
+ return __builtin_isfinite (x);
+}
+
+/* { dg-final { scan-assembler-not {\mfcmpu\M} } } */
+/* { dg-final { scan-assembler-times {\mxststdc[sd]p\M} 2 } } */
new file mode 100644
@@ -0,0 +1,13 @@
+/* { dg-do compile { target lp64 } } */
+/* { dg-require-effective-target ppc_float128_sw } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-O2 -mdejagnu-cpu=power9 -mvsx -mabi=ieeelongdouble -Wno-psabi" } */
+
+int test1 (long double x)
+{
+ return __builtin_isfinite (x);
+}
+
+
+/* { dg-final { scan-assembler-not {\mxscmpuqp\M} } } */
+/* { dg-final { scan-assembler {\mxststdcqp\M} } } */