[PATCHv2,1/2] aarch64: Do not give ABI change diagnostics for _BitInt(N)
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Commit Message
This patch makes sure we do not give ABI change diagnostics for the ABI
breaks of GCC 9, 13 and 14 for any type involving _BitInt(N), since that
type did not exist before this GCC version.
ChangeLog:
* config/aarch64/aarch64.cc (bitint_or_aggr_of_bitint_p): New function.
(aarch64_layout_arg): Don't emit diagnostics for types involving
_BitInt(N).
Comments
"Andre Vieira (lists)" <andre.simoesdiasvieira@arm.com> writes:
> This patch makes sure we do not give ABI change diagnostics for the ABI
> breaks of GCC 9, 13 and 14 for any type involving _BitInt(N), since that
> type did not exist before this GCC version.
>
> ChangeLog:
>
> * config/aarch64/aarch64.cc (bitint_or_aggr_of_bitint_p): New function.
> (aarch64_layout_arg): Don't emit diagnostics for types involving
> _BitInt(N).
>
> diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
> index 1ea84c8bd7386e399f6ffa3a5e36408cf8831fc6..b68cf3e7cb9a6fa89b4e5826a39ffa11f64ca20a 100644
> --- a/gcc/config/aarch64/aarch64.cc
> +++ b/gcc/config/aarch64/aarch64.cc
> @@ -6744,6 +6744,33 @@ aarch64_function_arg_alignment (machine_mode mode, const_tree type,
> return alignment;
> }
>
> +/* Return true if TYPE describes a _BitInt(N) or an angreggate that uses the
> + _BitInt(N) type. These include ARRAY_TYPE's with an element that is a
> + _BitInt(N) or an aggregate that uses it, and a RECORD_TYPE or a UNION_TYPE
> + with a field member that is a _BitInt(N) or an aggregate that uses it.
> + Return false otherwise. */
> +
> +static bool
> +bitint_or_aggr_of_bitint_p (tree type)
> +{
> + if (!type)
> + return false;
> +
> + if (TREE_CODE (type) == BITINT_TYPE)
> + return true;
> +
> + /* If ARRAY_TYPE, check it's element type. */
> + if (TREE_CODE (type) == ARRAY_TYPE)
> + return bitint_or_aggr_of_bitint_p (TREE_TYPE (type));
> +
> + /* If RECORD_TYPE or UNION_TYPE, check the fields' types. */
> + if (RECORD_OR_UNION_TYPE_P (type))
> + for (tree field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
> + if (bitint_or_aggr_of_bitint_p (TREE_TYPE (field)))
> + return true;
> + return false;
> +}
> +
> /* Layout a function argument according to the AAPCS64 rules. The rule
> numbers refer to the rule numbers in the AAPCS64. ORIG_MODE is the
> mode that was originally given to us by the target hook, whereas the
> @@ -6767,12 +6794,6 @@ aarch64_layout_arg (cumulative_args_t pcum_v, const function_arg_info &arg)
> if (pcum->aapcs_arg_processed)
> return;
>
> - bool warn_pcs_change
> - = (warn_psabi
> - && !pcum->silent_p
> - && (currently_expanding_function_start
> - || currently_expanding_gimple_stmt));
> -
> /* HFAs and HVAs can have an alignment greater than 16 bytes. For example:
>
> typedef struct foo {
> @@ -6907,6 +6928,18 @@ aarch64_layout_arg (cumulative_args_t pcum_v, const function_arg_info &arg)
> && (!alignment || abi_break_gcc_9 < alignment)
> && (!abi_break_gcc_13 || alignment < abi_break_gcc_13));
>
> +
> + bool warn_pcs_change
> + = (warn_psabi
> + && !pcum->silent_p
> + && (currently_expanding_function_start
> + || currently_expanding_gimple_stmt)
> + /* warn_pcs_change is currently used to gate diagnostics in case of
> + abi_break_gcc_{9,13,14}. These however, do not apply to _BitInt(N)
> + types as they were only introduced in GCC 14. */
> + && (!type || !bitint_or_aggr_of_bitint_p (type)));
How about making this a new variable such as:
/* _BitInt(N) was only added in GCC 14. */
bool warn_pcs_change_le_gcc14
= (warn_psabi && !bitint_or_aggr_of_bitint_p (type);
(and keeping warn_pcs_change where it is). In principle, warn_pcs_change
is meaningful for any future ABI breaks, and we might forget that it
excludes bitints. The name is just a suggestion.
OK with that change, thanks.
Richard
> +
> +
> /* allocate_ncrn may be false-positive, but allocate_nvrn is quite reliable.
> The following code thus handles passing by SIMD/FP registers first. */
>
> @@ -21266,19 +21299,25 @@ aarch64_gimplify_va_arg_expr (tree valist, tree type, gimple_seq *pre_p,
> rsize = ROUND_UP (size, UNITS_PER_WORD);
> nregs = rsize / UNITS_PER_WORD;
>
> - if (align <= 8 && abi_break_gcc_13 && warn_psabi)
> + if (align <= 8
> + && abi_break_gcc_13
> + && warn_psabi
> + && !bitint_or_aggr_of_bitint_p (type))
> inform (input_location, "parameter passing for argument of type "
> "%qT changed in GCC 13.1", type);
>
> if (warn_psabi
> && abi_break_gcc_14
> - && (abi_break_gcc_14 > 8 * BITS_PER_UNIT) != (align > 8))
> + && (abi_break_gcc_14 > 8 * BITS_PER_UNIT) != (align > 8)
> + && !bitint_or_aggr_of_bitint_p (type))
> inform (input_location, "parameter passing for argument of type "
> "%qT changed in GCC 14.1", type);
>
> if (align > 8)
> {
> - if (abi_break_gcc_9 && warn_psabi)
> + if (abi_break_gcc_9
> + && warn_psabi
> + && !bitint_or_aggr_of_bitint_p (type))
> inform (input_location, "parameter passing for argument of type "
> "%qT changed in GCC 9.1", type);
> dw_align = true;
Hey,
Added the warn_pcs_change_le_gcc14 variable and changed the uses of
warn_pcs_change to use this new variable.
Also fixed an issue with the loop through TREE_FIELDS to avoid an ICE
during bootstrap.
OK for trunk?
Bootstrapped and regression tested on aarch64-unknown-linux-gnu.
Kind regards,
Andre
On 28/03/2024 12:54, Richard Sandiford wrote:
> "Andre Vieira (lists)" <andre.simoesdiasvieira@arm.com> writes:
>> This patch makes sure we do not give ABI change diagnostics for the ABI
>> breaks of GCC 9, 13 and 14 for any type involving _BitInt(N), since that
>> type did not exist before this GCC version.
>>
>> ChangeLog:
>>
>> * config/aarch64/aarch64.cc (bitint_or_aggr_of_bitint_p): New function.
>> (aarch64_layout_arg): Don't emit diagnostics for types involving
>> _BitInt(N).
>>
>> diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
>> index 1ea84c8bd7386e399f6ffa3a5e36408cf8831fc6..b68cf3e7cb9a6fa89b4e5826a39ffa11f64ca20a 100644
>> --- a/gcc/config/aarch64/aarch64.cc
>> +++ b/gcc/config/aarch64/aarch64.cc
>> @@ -6744,6 +6744,33 @@ aarch64_function_arg_alignment (machine_mode mode, const_tree type,
>> return alignment;
>> }
>>
>> +/* Return true if TYPE describes a _BitInt(N) or an angreggate that uses the
>> + _BitInt(N) type. These include ARRAY_TYPE's with an element that is a
>> + _BitInt(N) or an aggregate that uses it, and a RECORD_TYPE or a UNION_TYPE
>> + with a field member that is a _BitInt(N) or an aggregate that uses it.
>> + Return false otherwise. */
>> +
>> +static bool
>> +bitint_or_aggr_of_bitint_p (tree type)
>> +{
>> + if (!type)
>> + return false;
>> +
>> + if (TREE_CODE (type) == BITINT_TYPE)
>> + return true;
>> +
>> + /* If ARRAY_TYPE, check it's element type. */
>> + if (TREE_CODE (type) == ARRAY_TYPE)
>> + return bitint_or_aggr_of_bitint_p (TREE_TYPE (type));
>> +
>> + /* If RECORD_TYPE or UNION_TYPE, check the fields' types. */
>> + if (RECORD_OR_UNION_TYPE_P (type))
>> + for (tree field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
>> + if (bitint_or_aggr_of_bitint_p (TREE_TYPE (field)))
>> + return true;
>> + return false;
>> +}
>> +
>> /* Layout a function argument according to the AAPCS64 rules. The rule
>> numbers refer to the rule numbers in the AAPCS64. ORIG_MODE is the
>> mode that was originally given to us by the target hook, whereas the
>> @@ -6767,12 +6794,6 @@ aarch64_layout_arg (cumulative_args_t pcum_v, const function_arg_info &arg)
>> if (pcum->aapcs_arg_processed)
>> return;
>>
>> - bool warn_pcs_change
>> - = (warn_psabi
>> - && !pcum->silent_p
>> - && (currently_expanding_function_start
>> - || currently_expanding_gimple_stmt));
>> -
>> /* HFAs and HVAs can have an alignment greater than 16 bytes. For example:
>>
>> typedef struct foo {
>> @@ -6907,6 +6928,18 @@ aarch64_layout_arg (cumulative_args_t pcum_v, const function_arg_info &arg)
>> && (!alignment || abi_break_gcc_9 < alignment)
>> && (!abi_break_gcc_13 || alignment < abi_break_gcc_13));
>>
>> +
>> + bool warn_pcs_change
>> + = (warn_psabi
>> + && !pcum->silent_p
>> + && (currently_expanding_function_start
>> + || currently_expanding_gimple_stmt)
>> + /* warn_pcs_change is currently used to gate diagnostics in case of
>> + abi_break_gcc_{9,13,14}. These however, do not apply to _BitInt(N)
>> + types as they were only introduced in GCC 14. */
>> + && (!type || !bitint_or_aggr_of_bitint_p (type)));
>
> How about making this a new variable such as:
>
> /* _BitInt(N) was only added in GCC 14. */
> bool warn_pcs_change_le_gcc14
> = (warn_psabi && !bitint_or_aggr_of_bitint_p (type);
>
> (and keeping warn_pcs_change where it is). In principle, warn_pcs_change
> is meaningful for any future ABI breaks, and we might forget that it
> excludes bitints. The name is just a suggestion.
>
> OK with that change, thanks.
>
> Richard
>
>> +
>> +
>> /* allocate_ncrn may be false-positive, but allocate_nvrn is quite reliable.
>> The following code thus handles passing by SIMD/FP registers first. */
>>
>> @@ -21266,19 +21299,25 @@ aarch64_gimplify_va_arg_expr (tree valist, tree type, gimple_seq *pre_p,
>> rsize = ROUND_UP (size, UNITS_PER_WORD);
>> nregs = rsize / UNITS_PER_WORD;
>>
>> - if (align <= 8 && abi_break_gcc_13 && warn_psabi)
>> + if (align <= 8
>> + && abi_break_gcc_13
>> + && warn_psabi
>> + && !bitint_or_aggr_of_bitint_p (type))
>> inform (input_location, "parameter passing for argument of type "
>> "%qT changed in GCC 13.1", type);
>>
>> if (warn_psabi
>> && abi_break_gcc_14
>> - && (abi_break_gcc_14 > 8 * BITS_PER_UNIT) != (align > 8))
>> + && (abi_break_gcc_14 > 8 * BITS_PER_UNIT) != (align > 8)
>> + && !bitint_or_aggr_of_bitint_p (type))
>> inform (input_location, "parameter passing for argument of type "
>> "%qT changed in GCC 14.1", type);
>>
>> if (align > 8)
>> {
>> - if (abi_break_gcc_9 && warn_psabi)
>> + if (abi_break_gcc_9
>> + && warn_psabi
>> + && !bitint_or_aggr_of_bitint_p (type))
>> inform (input_location, "parameter passing for argument of type "
>> "%qT changed in GCC 9.1", type);
>> dw_align = true;
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 1ea84c8bd7386e399f6ffa3a5e36408cf8831fc6..81400cc666472ffeff40df14e98ae00ebc774d31 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -6744,6 +6744,37 @@ aarch64_function_arg_alignment (machine_mode mode, const_tree type,
return alignment;
}
+/* Return true if TYPE describes a _BitInt(N) or an angreggate that uses the
+ _BitInt(N) type. These include ARRAY_TYPE's with an element that is a
+ _BitInt(N) or an aggregate that uses it, and a RECORD_TYPE or a UNION_TYPE
+ with a field member that is a _BitInt(N) or an aggregate that uses it.
+ Return false otherwise. */
+
+static bool
+bitint_or_aggr_of_bitint_p (tree type)
+{
+ if (!type)
+ return false;
+
+ if (TREE_CODE (type) == BITINT_TYPE)
+ return true;
+
+ /* If ARRAY_TYPE, check it's element type. */
+ if (TREE_CODE (type) == ARRAY_TYPE)
+ return bitint_or_aggr_of_bitint_p (TREE_TYPE (type));
+
+ /* If RECORD_TYPE or UNION_TYPE, check the fields' types. */
+ if (RECORD_OR_UNION_TYPE_P (type))
+ for (tree field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
+ {
+ if (TREE_CODE (field) != FIELD_DECL)
+ continue;
+ if (bitint_or_aggr_of_bitint_p (TREE_TYPE (field)))
+ return true;
+ }
+ return false;
+}
+
/* Layout a function argument according to the AAPCS64 rules. The rule
numbers refer to the rule numbers in the AAPCS64. ORIG_MODE is the
mode that was originally given to us by the target hook, whereas the
@@ -6907,6 +6938,11 @@ aarch64_layout_arg (cumulative_args_t pcum_v, const function_arg_info &arg)
&& (!alignment || abi_break_gcc_9 < alignment)
&& (!abi_break_gcc_13 || alignment < abi_break_gcc_13));
+ /* _BitInt(N) was only added in GCC 14. */
+ bool warn_pcs_change_le_gcc14
+ = warn_pcs_change && !bitint_or_aggr_of_bitint_p (type);
+
+
/* allocate_ncrn may be false-positive, but allocate_nvrn is quite reliable.
The following code thus handles passing by SIMD/FP registers first. */
@@ -6978,14 +7014,14 @@ aarch64_layout_arg (cumulative_args_t pcum_v, const function_arg_info &arg)
{
/* Emit a warning if the alignment changed when taking the
'packed' attribute into account. */
- if (warn_pcs_change
+ if (warn_pcs_change_le_gcc14
&& abi_break_gcc_13
&& ((abi_break_gcc_13 == 16 * BITS_PER_UNIT)
!= (alignment == 16 * BITS_PER_UNIT)))
inform (input_location, "parameter passing for argument of type "
"%qT changed in GCC 13.1", type);
- if (warn_pcs_change
+ if (warn_pcs_change_le_gcc14
&& abi_break_gcc_14
&& ((abi_break_gcc_14 == 16 * BITS_PER_UNIT)
!= (alignment == 16 * BITS_PER_UNIT)))
@@ -6998,7 +7034,8 @@ aarch64_layout_arg (cumulative_args_t pcum_v, const function_arg_info &arg)
passed by reference rather than value. */
if (alignment == 16 * BITS_PER_UNIT)
{
- if (warn_pcs_change && abi_break_gcc_9)
+ if (warn_pcs_change_le_gcc14
+ && abi_break_gcc_9)
inform (input_location, "parameter passing for argument of type "
"%qT changed in GCC 9.1", type);
++ncrn;
@@ -7056,14 +7093,14 @@ aarch64_layout_arg (cumulative_args_t pcum_v, const function_arg_info &arg)
on_stack:
pcum->aapcs_stack_words = size / UNITS_PER_WORD;
- if (warn_pcs_change
+ if (warn_pcs_change_le_gcc14
&& abi_break_gcc_13
&& ((abi_break_gcc_13 >= 16 * BITS_PER_UNIT)
!= (alignment >= 16 * BITS_PER_UNIT)))
inform (input_location, "parameter passing for argument of type "
"%qT changed in GCC 13.1", type);
- if (warn_pcs_change
+ if (warn_pcs_change_le_gcc14
&& abi_break_gcc_14
&& ((abi_break_gcc_14 >= 16 * BITS_PER_UNIT)
!= (alignment >= 16 * BITS_PER_UNIT)))
@@ -7075,7 +7112,8 @@ on_stack:
int new_size = ROUND_UP (pcum->aapcs_stack_size, 16 / UNITS_PER_WORD);
if (pcum->aapcs_stack_size != new_size)
{
- if (warn_pcs_change && abi_break_gcc_9)
+ if (warn_pcs_change_le_gcc14
+ && abi_break_gcc_9)
inform (input_location, "parameter passing for argument of type "
"%qT changed in GCC 9.1", type);
pcum->aapcs_stack_size = new_size;
@@ -21266,19 +21304,25 @@ aarch64_gimplify_va_arg_expr (tree valist, tree type, gimple_seq *pre_p,
rsize = ROUND_UP (size, UNITS_PER_WORD);
nregs = rsize / UNITS_PER_WORD;
- if (align <= 8 && abi_break_gcc_13 && warn_psabi)
+ if (align <= 8
+ && abi_break_gcc_13
+ && warn_psabi
+ && !bitint_or_aggr_of_bitint_p (type))
inform (input_location, "parameter passing for argument of type "
"%qT changed in GCC 13.1", type);
if (warn_psabi
&& abi_break_gcc_14
- && (abi_break_gcc_14 > 8 * BITS_PER_UNIT) != (align > 8))
+ && (abi_break_gcc_14 > 8 * BITS_PER_UNIT) != (align > 8)
+ && !bitint_or_aggr_of_bitint_p (type))
inform (input_location, "parameter passing for argument of type "
"%qT changed in GCC 14.1", type);
if (align > 8)
{
- if (abi_break_gcc_9 && warn_psabi)
+ if (abi_break_gcc_9
+ && warn_psabi
+ && !bitint_or_aggr_of_bitint_p (type))
inform (input_location, "parameter passing for argument of type "
"%qT changed in GCC 9.1", type);
dw_align = true;
"Andre Vieira (lists)" <andre.simoesdiasvieira@arm.com> writes:
> @@ -6907,6 +6938,11 @@ aarch64_layout_arg (cumulative_args_t pcum_v, const function_arg_info &arg)
> && (!alignment || abi_break_gcc_9 < alignment)
> && (!abi_break_gcc_13 || alignment < abi_break_gcc_13));
>
> + /* _BitInt(N) was only added in GCC 14. */
> + bool warn_pcs_change_le_gcc14
> + = warn_pcs_change && !bitint_or_aggr_of_bitint_p (type);
> +
> +
Excess blank line.
OK with that removed, thanks (no need to retest).
Richard
@@ -6744,6 +6744,33 @@ aarch64_function_arg_alignment (machine_mode mode, const_tree type,
return alignment;
}
+/* Return true if TYPE describes a _BitInt(N) or an angreggate that uses the
+ _BitInt(N) type. These include ARRAY_TYPE's with an element that is a
+ _BitInt(N) or an aggregate that uses it, and a RECORD_TYPE or a UNION_TYPE
+ with a field member that is a _BitInt(N) or an aggregate that uses it.
+ Return false otherwise. */
+
+static bool
+bitint_or_aggr_of_bitint_p (tree type)
+{
+ if (!type)
+ return false;
+
+ if (TREE_CODE (type) == BITINT_TYPE)
+ return true;
+
+ /* If ARRAY_TYPE, check it's element type. */
+ if (TREE_CODE (type) == ARRAY_TYPE)
+ return bitint_or_aggr_of_bitint_p (TREE_TYPE (type));
+
+ /* If RECORD_TYPE or UNION_TYPE, check the fields' types. */
+ if (RECORD_OR_UNION_TYPE_P (type))
+ for (tree field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
+ if (bitint_or_aggr_of_bitint_p (TREE_TYPE (field)))
+ return true;
+ return false;
+}
+
/* Layout a function argument according to the AAPCS64 rules. The rule
numbers refer to the rule numbers in the AAPCS64. ORIG_MODE is the
mode that was originally given to us by the target hook, whereas the
@@ -6767,12 +6794,6 @@ aarch64_layout_arg (cumulative_args_t pcum_v, const function_arg_info &arg)
if (pcum->aapcs_arg_processed)
return;
- bool warn_pcs_change
- = (warn_psabi
- && !pcum->silent_p
- && (currently_expanding_function_start
- || currently_expanding_gimple_stmt));
-
/* HFAs and HVAs can have an alignment greater than 16 bytes. For example:
typedef struct foo {
@@ -6907,6 +6928,18 @@ aarch64_layout_arg (cumulative_args_t pcum_v, const function_arg_info &arg)
&& (!alignment || abi_break_gcc_9 < alignment)
&& (!abi_break_gcc_13 || alignment < abi_break_gcc_13));
+
+ bool warn_pcs_change
+ = (warn_psabi
+ && !pcum->silent_p
+ && (currently_expanding_function_start
+ || currently_expanding_gimple_stmt)
+ /* warn_pcs_change is currently used to gate diagnostics in case of
+ abi_break_gcc_{9,13,14}. These however, do not apply to _BitInt(N)
+ types as they were only introduced in GCC 14. */
+ && (!type || !bitint_or_aggr_of_bitint_p (type)));
+
+
/* allocate_ncrn may be false-positive, but allocate_nvrn is quite reliable.
The following code thus handles passing by SIMD/FP registers first. */
@@ -21266,19 +21299,25 @@ aarch64_gimplify_va_arg_expr (tree valist, tree type, gimple_seq *pre_p,
rsize = ROUND_UP (size, UNITS_PER_WORD);
nregs = rsize / UNITS_PER_WORD;
- if (align <= 8 && abi_break_gcc_13 && warn_psabi)
+ if (align <= 8
+ && abi_break_gcc_13
+ && warn_psabi
+ && !bitint_or_aggr_of_bitint_p (type))
inform (input_location, "parameter passing for argument of type "
"%qT changed in GCC 13.1", type);
if (warn_psabi
&& abi_break_gcc_14
- && (abi_break_gcc_14 > 8 * BITS_PER_UNIT) != (align > 8))
+ && (abi_break_gcc_14 > 8 * BITS_PER_UNIT) != (align > 8)
+ && !bitint_or_aggr_of_bitint_p (type))
inform (input_location, "parameter passing for argument of type "
"%qT changed in GCC 14.1", type);
if (align > 8)
{
- if (abi_break_gcc_9 && warn_psabi)
+ if (abi_break_gcc_9
+ && warn_psabi
+ && !bitint_or_aggr_of_bitint_p (type))
inform (input_location, "parameter passing for argument of type "
"%qT changed in GCC 9.1", type);
dw_align = true;