diff mbox series

[committed] Fix a few arc tests

Message ID 3e3ec1e5-378a-464a-a18c-0e0cd2a08f19@gmail.com
State Committed
Commit 595c695216e72c8491bf20d30e5298e2064caa73
Headers
Series [committed] Fix a few arc tests |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_gcc_build--master-arm warning Patch is already merged
linaro-tcwg-bot/tcwg_gcc_build--master-aarch64 warning Patch is already merged

Commit Message

Jeff Law Dec. 3, 2023, 5:25 a.m. UTC 
  Similar to others.  Where it's easy to fix the implicit types or add 
prototypes I did.  One was just ugly and I didn't want to think too 
hard, so I just added -fpermissive.

Pushed to the trunk.

Jeff
commit 595c695216e72c8491bf20d30e5298e2064caa73
Author: Jeff Law <jlaw@ventanamicro.com>
Date:   Sat Dec 2 22:16:33 2023 -0700

    [committed] Fix a few arc tests
    
    Similar to others.  Where it's easy to fix the implicit types or add prototypes
    I did.  One was just ugly and I didn't want to think too hard, so I just added
    -fpermissive.
    
    Pushed to the trunk.
    
    gcc/testsuite
            * gcc.target/arc/lra-1.c: Fix missing prototypes and implicit
            types in variable definitions.
            * gcc.target/arc/pic-1.c: Similarly.
            * gcc.target/arc/pr9001191897.c: Similarly.
            * gcc.target/arc/pr9001195952.c: Add -fpermissive.
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/arc/lra-1.c b/gcc/testsuite/gcc.target/arc/lra-1.c
index 27336d1a6af..3c936453663 100644
--- a/gcc/testsuite/gcc.target/arc/lra-1.c
+++ b/gcc/testsuite/gcc.target/arc/lra-1.c
@@ -4,12 +4,16 @@ 
 /* ap is replaced with an address like base+offset by lra,
    where offset is larger than s9, resulting into an ICE.  */
 
-typedef struct { char a[500] } b;
-c;
+typedef struct { char a[500]; } b;
+int c;
 struct d {
   short e;
-  b f
-} g(int h, int i, int j, int k, char l, int m, int n, char *p) {
+  b f;
+};
+
+int q (struct d);
+
+struct d g(int h, int i, int j, int k, char l, int m, int n, char *p) {
 again:;
   struct d o;
   *p = c = ({ q(o); });
diff --git a/gcc/testsuite/gcc.target/arc/pic-1.c b/gcc/testsuite/gcc.target/arc/pic-1.c
index ab24763b67f..ed1e4d3765e 100644
--- a/gcc/testsuite/gcc.target/arc/pic-1.c
+++ b/gcc/testsuite/gcc.target/arc/pic-1.c
@@ -3,6 +3,9 @@ 
 /* { dg-skip-if "PIC not available for ARC6xx" { arc6xx } } */
 /* { dg-options "-mno-sdata -w -Os -fpic" } */
 
+void e (char);
+
+void 
 a() {
   char *b = "";
   char c;
diff --git a/gcc/testsuite/gcc.target/arc/pr9001191897.c b/gcc/testsuite/gcc.target/arc/pr9001191897.c
index fc3642629d3..d51b0429044 100644
--- a/gcc/testsuite/gcc.target/arc/pr9001191897.c
+++ b/gcc/testsuite/gcc.target/arc/pr9001191897.c
@@ -1,7 +1,8 @@ 
 /* { dg-do compile } */
 /* { dg-skip-if "" { ! { clmcpu } } } */
 /* { dg-options "-mcpu=archs -Os -fpic -mno-sdata -mno-indexed-loads -w" } */
-a;
+int a;
+void
 c() {
   static char b[25];
   for (; a >= 0; a--)
diff --git a/gcc/testsuite/gcc.target/arc/pr9001195952.c b/gcc/testsuite/gcc.target/arc/pr9001195952.c
index 252438d8d78..f820960d5e3 100644
--- a/gcc/testsuite/gcc.target/arc/pr9001195952.c
+++ b/gcc/testsuite/gcc.target/arc/pr9001195952.c
@@ -1,6 +1,6 @@ 
 /* { dg-do compile } */
 /* { dg-skip-if "" { ! { clmcpu } } } */
-/* { dg-options "-mcpu=archs -Os -w -fpic" } */
+/* { dg-options "-mcpu=archs -Os -w -fpic -fpermissive" } */
 
 /* tst_movb split pattern is wrong for anything else than NPS
    chip.  */