[PATCH-3,rs6000] Set CC mode of vector string isolate insns to CCEQ
Checks
Context |
Check |
Description |
linaro-tcwg-bot/tcwg_gcc_build--master-arm |
success
|
Testing passed
|
linaro-tcwg-bot/tcwg_gcc_check--master-arm |
success
|
Testing passed
|
linaro-tcwg-bot/tcwg_gcc_build--master-aarch64 |
success
|
Testing passed
|
linaro-tcwg-bot/tcwg_gcc_check--master-aarch64 |
success
|
Testing passed
|
Commit Message
Hi,
It's the third patch of a series of patches optimizing CC modes on
rs6000.
This patch sets CC mode of vector string isolate insns to CCEQ instead
of CCFP as these insns only set/check CR bit 2.
Bootstrapped and tested on powerpc64-linux BE and LE with no
regressions. Is it OK for the trunk?
Thanks
Gui Haochen
ChangeLog
rs6000: Set CC mode of vector string isolate insns to CCEQ
gcc/
* config/rs6000/altivec.md (vstrir_p_direct_<mode>): Replace CCFP
with CCEQ.
(vstril_p_direct_<mode>): Likewise.
patch.diff
@@ -932,9 +932,9 @@ (define_insn "vstrir_p_direct_<mode>"
(unspec:VIshort
[(match_operand:VIshort 1 "altivec_register_operand" "v")]
UNSPEC_VSTRIR))
- (set (reg:CC CR6_REGNO)
- (unspec:CC [(match_dup 1)]
- UNSPEC_VSTRIR))]
+ (set (reg:CCEQ CR6_REGNO)
+ (unspec:CCEQ [(match_dup 1)]
+ UNSPEC_VSTRIR))]
"TARGET_POWER10"
"vstri<wd>r. %0,%1"
[(set_attr "type" "vecsimple")])
@@ -984,9 +984,9 @@ (define_insn "vstril_p_direct_<mode>"
(unspec:VIshort
[(match_operand:VIshort 1 "altivec_register_operand" "v")]
UNSPEC_VSTRIL))
- (set (reg:CC CR6_REGNO)
- (unspec:CC [(match_dup 1)]
- UNSPEC_VSTRIR))]
+ (set (reg:CCEQ CR6_REGNO)
+ (unspec:CCEQ [(match_dup 1)]
+ UNSPEC_VSTRIR))]
"TARGET_POWER10"
"vstri<wd>l. %0,%1"
[(set_attr "type" "vecsimple")])