[v2] LoongArch: testsuite:Added additional vectorization "-mlsx" option.

  gcc/testsuite/ChangeLog:

	* gcc.dg/pr104992.c: Added additional "-mlsx" compilation options.
	* gcc.dg/signbit-2.c: Dito.
	* gcc.dg/tree-ssa/scev-16.c: Dito.
	* gfortran.dg/graphite/vect-pr40979.f90: Dito.
	* gfortran.dg/vect/fast-math-mgrid-resid.f: Dito.
---
 gcc/testsuite/gcc.dg/pr104992.c                        | 1 +
 gcc/testsuite/gcc.dg/signbit-2.c                       | 1 +
 gcc/testsuite/gcc.dg/tree-ssa/scev-16.c                | 1 +
 gcc/testsuite/gfortran.dg/graphite/vect-pr40979.f90    | 1 +
 gcc/testsuite/gfortran.dg/vect/fast-math-mgrid-resid.f | 1 +
 5 files changed, 5 insertions(+)
  

在 2024-01-13星期六的 15:28 +0800，chenxiaolong写道：
> gcc/testsuite/ChangeLog:
> 
> 	* gcc.dg/pr104992.c: Added additional "-mlsx" compilation options.
> 	* gcc.dg/signbit-2.c: Dito.
> 	* gcc.dg/tree-ssa/scev-16.c: Dito.
> 	* gfortran.dg/graphite/vect-pr40979.f90: Dito.
> 	* gfortran.dg/vect/fast-math-mgrid-resid.f: Dito.

I don't feel it right about the changes to pr104992.c and scev-16.c
because no other architectures add special options there.  Why are we
so special?

> ---
>  gcc/testsuite/gcc.dg/pr104992.c                        | 1 +
>  gcc/testsuite/gcc.dg/signbit-2.c                       | 1 +
>  gcc/testsuite/gcc.dg/tree-ssa/scev-16.c                | 1 +
>  gcc/testsuite/gfortran.dg/graphite/vect-pr40979.f90    | 1 +
>  gcc/testsuite/gfortran.dg/vect/fast-math-mgrid-resid.f | 1 +
>  5 files changed, 5 insertions(+)
> 
> diff --git a/gcc/testsuite/gcc.dg/pr104992.c b/gcc/testsuite/gcc.dg/pr104992.c
> index 82f8c75559c..a77992fa491 100644
> --- a/gcc/testsuite/gcc.dg/pr104992.c
> +++ b/gcc/testsuite/gcc.dg/pr104992.c
> @@ -1,6 +1,7 @@
>  /* PR tree-optimization/104992 */
>  /* { dg-do compile } */
>  /* { dg-options "-O2 -Wno-psabi -fdump-tree-optimized" } */
> +/* { dg-additional-options "-mlsx" { target loongarch_sx } } */
>  
>  #define vector __attribute__((vector_size(4*sizeof(int))))
>  
> diff --git a/gcc/testsuite/gcc.dg/signbit-2.c b/gcc/testsuite/gcc.dg/signbit-2.c
> index 62bb4047d74..5511bb78149 100644
> --- a/gcc/testsuite/gcc.dg/signbit-2.c
> +++ b/gcc/testsuite/gcc.dg/signbit-2.c
> @@ -5,6 +5,7 @@
>  /* { dg-additional-options "-msse2 -mno-avx512f" { target { i?86-*-* x86_64-*-* } } } */
>  /* { dg-additional-options "-march=armv8-a" { target aarch64_sve } } */
>  /* { dg-additional-options "-maltivec" { target powerpc_altivec_ok } } */
> +/* { dg-additional-options "-mlsx" { target loongarch_sx } } */
>  /* { dg-skip-if "no fallback for MVE" { arm_mve } } */
>  
>  #include <stdint.h>
> diff --git a/gcc/testsuite/gcc.dg/tree-ssa/scev-16.c b/gcc/testsuite/gcc.dg/tree-ssa/scev-16.c
> index 120f40c0b6c..06cfbbcfae5 100644
> --- a/gcc/testsuite/gcc.dg/tree-ssa/scev-16.c
> +++ b/gcc/testsuite/gcc.dg/tree-ssa/scev-16.c
> @@ -1,6 +1,7 @@
>  /* { dg-do compile } */
>  /* { dg-require-effective-target vect_int } */
>  /* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details" } */
> +/* { dg-additional-options "-mlsx" { target { loongarch*-*-* } } } */
>  
>  int A[1024 * 2];
>  
> diff --git a/gcc/testsuite/gfortran.dg/graphite/vect-pr40979.f90 b/gcc/testsuite/gfortran.dg/graphite/vect-pr40979.f90
> index a42290948c4..6f2ad1166a4 100644
> --- a/gcc/testsuite/gfortran.dg/graphite/vect-pr40979.f90
> +++ b/gcc/testsuite/gfortran.dg/graphite/vect-pr40979.f90
> @@ -1,6 +1,7 @@
>  ! { dg-do compile }
>  ! { dg-require-effective-target vect_double }
>  ! { dg-additional-options "-msse2" { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
> +! { dg-additional-options "-mlsx" { target { loongarch*-*-* } } }
>  
>  module mqc_m
>  integer, parameter, private :: longreal = selected_real_kind(15,90)
> diff --git a/gcc/testsuite/gfortran.dg/vect/fast-math-mgrid-resid.f b/gcc/testsuite/gfortran.dg/vect/fast-math-mgrid-resid.f
> index 08965cc5e20..97b88821731 100644
> --- a/gcc/testsuite/gfortran.dg/vect/fast-math-mgrid-resid.f
> +++ b/gcc/testsuite/gfortran.dg/vect/fast-math-mgrid-resid.f
> @@ -2,6 +2,7 @@
>  ! { dg-require-effective-target vect_double }
>  ! { dg-options "-O3 --param vect-max-peeling-for-alignment=0 -fpredictive-commoning -fdump-tree-pcom-details -std=legacy" }
>  ! { dg-additional-options "-mprefer-avx128" { target { i?86-*-* x86_64-*-* } } }
> +! { dg-additional-options "-mlsx" { target { loongarch*-*-* } } }
>  ! { dg-additional-options "-mzarch" { target { s390*-*-* } } }
>  
>  ******* RESID COMPUTES THE RESIDUAL:  R = V - AU
  

At 21:13 +0800 on Saturday, 2024-01-13, Xi Ruoyao wrote：
> At 15:28 +0800 on Saturday 2024-01-13, chenxiaolong wrote：
> > gcc/testsuite/ChangeLog:
> > 
> > 	* gcc.dg/pr104992.c: Added additional "-mlsx" compilation
> > options.
> > 	* gcc.dg/signbit-2.c: Dito.
> > 	* gcc.dg/tree-ssa/scev-16.c: Dito.
> > 	* gfortran.dg/graphite/vect-pr40979.f90: Dito.
> > 	* gfortran.dg/vect/fast-math-mgrid-resid.f: Dito.
> 
> I don't feel it right about the changes to pr104992.c and scev-16.c
> because no other architectures add special options there.  Why are we
> so special?
> 
> > ---
> >  gcc/testsuite/gcc.dg/pr104992.c                        | 1 +
> >  gcc/testsuite/gcc.dg/signbit-2.c                       | 1 +
> >  gcc/testsuite/gcc.dg/tree-ssa/scev-16.c                | 1 +
> >  gcc/testsuite/gfortran.dg/graphite/vect-pr40979.f90    | 1 +
> >  gcc/testsuite/gfortran.dg/vect/fast-math-mgrid-resid.f | 1 +
> >  5 files changed, 5 insertions(+)
> > 
> > diff --git a/gcc/testsuite/gcc.dg/pr104992.c
> > b/gcc/testsuite/gcc.dg/pr104992.c
> > index 82f8c75559c..a77992fa491 100644
> > --- a/gcc/testsuite/gcc.dg/pr104992.c
> > +++ b/gcc/testsuite/gcc.dg/pr104992.c
> > @@ -1,6 +1,7 @@
> >  /* PR tree-optimization/104992 */
> >  /* { dg-do compile } */
> >  /* { dg-options "-O2 -Wno-psabi -fdump-tree-optimized" } */
> > +/* { dg-additional-options "-mlsx" { target loongarch_sx } } */
> >  
> >  #define vector __attribute__((vector_size(4*sizeof(int))))
> >  
> > diff --git a/gcc/testsuite/gcc.dg/signbit-2.c
> > b/gcc/testsuite/gcc.dg/signbit-2.c
> > index 62bb4047d74..5511bb78149 100644
> > --- a/gcc/testsuite/gcc.dg/signbit-2.c
> > +++ b/gcc/testsuite/gcc.dg/signbit-2.c
> > @@ -5,6 +5,7 @@
> >  /* { dg-additional-options "-msse2 -mno-avx512f" { target { i?86-
> > *-* x86_64-*-* } } } */
> >  /* { dg-additional-options "-march=armv8-a" { target aarch64_sve }
> > } */
> >  /* { dg-additional-options "-maltivec" { target powerpc_altivec_ok
> > } } */
> > +/* { dg-additional-options "-mlsx" { target loongarch_sx } } */
> >  /* { dg-skip-if "no fallback for MVE" { arm_mve } } */
> >  
> >  #include <stdint.h>
> > diff --git a/gcc/testsuite/gcc.dg/tree-ssa/scev-16.c
> > b/gcc/testsuite/gcc.dg/tree-ssa/scev-16.c
> > index 120f40c0b6c..06cfbbcfae5 100644
> > --- a/gcc/testsuite/gcc.dg/tree-ssa/scev-16.c
> > +++ b/gcc/testsuite/gcc.dg/tree-ssa/scev-16.c
> > @@ -1,6 +1,7 @@
> >  /* { dg-do compile } */
> >  /* { dg-require-effective-target vect_int } */
> >  /* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details" }
> > */
> > +/* { dg-additional-options "-mlsx" { target { loongarch*-*-* } } }
> > */
> >  
> >  int A[1024 * 2];
> >  
> > diff --git a/gcc/testsuite/gfortran.dg/graphite/vect-pr40979.f90
> > b/gcc/testsuite/gfortran.dg/graphite/vect-pr40979.f90
> > index a42290948c4..6f2ad1166a4 100644
> > --- a/gcc/testsuite/gfortran.dg/graphite/vect-pr40979.f90
> > +++ b/gcc/testsuite/gfortran.dg/graphite/vect-pr40979.f90
> > @@ -1,6 +1,7 @@
> >  ! { dg-do compile }
> >  ! { dg-require-effective-target vect_double }
> >  ! { dg-additional-options "-msse2" { target { { i?86-*-* x86_64-*-
> > * } && ilp32 } } }
> > +! { dg-additional-options "-mlsx" { target { loongarch*-*-* } } }
> >  
> >  module mqc_m
> >  integer, parameter, private :: longreal =
> > selected_real_kind(15,90)
> > diff --git a/gcc/testsuite/gfortran.dg/vect/fast-math-mgrid-resid.f 
> > b/gcc/testsuite/gfortran.dg/vect/fast-math-mgrid-resid.f
> > index 08965cc5e20..97b88821731 100644
> > --- a/gcc/testsuite/gfortran.dg/vect/fast-math-mgrid-resid.f
> > +++ b/gcc/testsuite/gfortran.dg/vect/fast-math-mgrid-resid.f
> > @@ -2,6 +2,7 @@
> >  ! { dg-require-effective-target vect_double }
> >  ! { dg-options "-O3 --param vect-max-peeling-for-alignment=0
> > -fpredictive-commoning -fdump-tree-pcom-details -std=legacy" }
> >  ! { dg-additional-options "-mprefer-avx128" { target { i?86-*-*
> > x86_64-*-* } } }
> > +! { dg-additional-options "-mlsx" { target { loongarch*-*-* } } }
> >  ! { dg-additional-options "-mzarch" { target { s390*-*-* } } }
> >  
> >  ******* RESID COMPUTES THE RESIDUAL:  R = V - AU

Because on the LoongArch architecture, GCC requires the addition of
vectorization options in order to generate vector code. Use the
check_effective_target_vect_cmdline_needed command in the lib/target-
supports.exp file to set whether the command line option is needed to
enable vectorizations. For example, ia64,x86,aarch64, and riscv
architectures, vectorization is enabled by default.
  

On Mon, 2024-01-15 at 09:29 +0800, chenxiaolong wrote:
> At 21:13 +0800 on Saturday, 2024-01-13, Xi Ruoyao wrote：
> > At 15:28 +0800 on Saturday 2024-01-13, chenxiaolong wrote：
> > > gcc/testsuite/ChangeLog:
> > > 
> > > 	* gcc.dg/pr104992.c: Added additional "-mlsx" compilation
> > > options.
> > > 	* gcc.dg/signbit-2.c: Dito.
> > > 	* gcc.dg/tree-ssa/scev-16.c: Dito.
> > > 	* gfortran.dg/graphite/vect-pr40979.f90: Dito.
> > > 	* gfortran.dg/vect/fast-math-mgrid-resid.f: Dito.
> > 
> > I don't feel it right about the changes to pr104992.c and scev-16.c
> > because no other architectures add special options there.  Why are we
> > so special?

> 
> Because on the LoongArch architecture, GCC requires the addition of
> vectorization options in order to generate vector code. Use the
> check_effective_target_vect_cmdline_needed command in the lib/target-
> supports.exp file to set whether the command line option is needed to
> enable vectorizations. For example, ia64,x86,aarch64, and riscv
> architectures, vectorization is enabled by default.

But no.  The default baseline of 32-bit x86 is i686, which is basically
a Pentium III launched in 1999 without any vector instructions.

We are still missing something here.
  

Xi Ruoyao <xry111@xry111.site> 于2024年1月15日周一 12:11写道：
>
> On Mon, 2024-01-15 at 09:29 +0800, chenxiaolong wrote:
> > At 21:13 +0800 on Saturday, 2024-01-13, Xi Ruoyao wrote：
> > > At 15:28 +0800 on Saturday 2024-01-13, chenxiaolong wrote：
> > > > gcc/testsuite/ChangeLog:
> > > >
> > > >   * gcc.dg/pr104992.c: Added additional "-mlsx" compilation
> > > > options.
> > > >   * gcc.dg/signbit-2.c: Dito.
> > > >   * gcc.dg/tree-ssa/scev-16.c: Dito.
> > > >   * gfortran.dg/graphite/vect-pr40979.f90: Dito.
> > > >   * gfortran.dg/vect/fast-math-mgrid-resid.f: Dito.
> > >
> > > I don't feel it right about the changes to pr104992.c and scev-16.c
> > > because no other architectures add special options there.  Why are we
> > > so special?
>
> >
> > Because on the LoongArch architecture, GCC requires the addition of
> > vectorization options in order to generate vector code. Use the
> > check_effective_target_vect_cmdline_needed command in the lib/target-
> > supports.exp file to set whether the command line option is needed to
> > enable vectorizations. For example, ia64,x86,aarch64, and riscv
> > architectures, vectorization is enabled by default.
>
> But no.  The default baseline of 32-bit x86 is i686, which is basically
> a Pentium III launched in 1999 without any vector instructions.
>
> We are still missing something here.
>
There is a line
     #define vector __attribute__((vector_size(4*sizeof(int))))
I guess it is the syntax needs to be supported.
  

On Mon, 2024-01-15 at 14:32 +0800, YunQiang Su wrote:
> Xi Ruoyao <xry111@xry111.site> 于2024年1月15日周一 12:11写道：
> > 
> > On Mon, 2024-01-15 at 09:29 +0800, chenxiaolong wrote:
> > > At 21:13 +0800 on Saturday, 2024-01-13, Xi Ruoyao wrote：
> > > > At 15:28 +0800 on Saturday 2024-01-13, chenxiaolong wrote：
> > > > > gcc/testsuite/ChangeLog:
> > > > > 
> > > > >   * gcc.dg/pr104992.c: Added additional "-mlsx" compilation
> > > > > options.
> > > > >   * gcc.dg/signbit-2.c: Dito.
> > > > >   * gcc.dg/tree-ssa/scev-16.c: Dito.
> > > > >   * gfortran.dg/graphite/vect-pr40979.f90: Dito.
> > > > >   * gfortran.dg/vect/fast-math-mgrid-resid.f: Dito.
> > > > 
> > > > I don't feel it right about the changes to pr104992.c and scev-16.c
> > > > because no other architectures add special options there.  Why are we
> > > > so special?
> > 
> > > 
> > > Because on the LoongArch architecture, GCC requires the addition of
> > > vectorization options in order to generate vector code. Use the
> > > check_effective_target_vect_cmdline_needed command in the lib/target-
> > > supports.exp file to set whether the command line option is needed to
> > > enable vectorizations. For example, ia64,x86,aarch64, and riscv
> > > architectures, vectorization is enabled by default.
> > 
> > But no.  The default baseline of 32-bit x86 is i686, which is basically
> > a Pentium III launched in 1999 without any vector instructions.
> > 
> > We are still missing something here.
> > 
> There is a line
>      #define vector __attribute__((vector_size(4*sizeof(int))))
> I guess it is the syntax needs to be supported.

This is always supported.  If the target does not have vector
instructions GCC will just expand vector arithmetic as a loop.

Maybe we should just move this test into gcc.dg/vect where the framework
automatically add options like -mlsx or -msse2?
  

At 14:42 +0800 on the first day of 2024-01-15, Xi Ruoyao wrote：
> On Mon, 2024-01-15 at 14:32 +0800, YunQiang Su wrote:
> > Xi Ruoyao <xry111@xry111.site> wrote at 12:11pm on Monday, January
> > 15, 2024：
> > > On Mon, 2024-01-15 at 09:29 +0800, chenxiaolong wrote:
> > > > At 21:13 +0800 on Saturday, 2024-01-13, Xi Ruoyao wrote：
> > > > > At 15:28 +0800 on Saturday 2024-01-13, chenxiaolong wrote：
> > > > > > gcc/testsuite/ChangeLog:
> > > > > > 
> > > > > >   * gcc.dg/pr104992.c: Added additional "-mlsx" compilation
> > > > > > options.
> > > > > >   * gcc.dg/signbit-2.c: Dito.
> > > > > >   * gcc.dg/tree-ssa/scev-16.c: Dito.
> > > > > >   * gfortran.dg/graphite/vect-pr40979.f90: Dito.
> > > > > >   * gfortran.dg/vect/fast-math-mgrid-resid.f: Dito.
> > > > > 
> > > > > I don't feel it right about the changes to pr104992.c and
> > > > > scev-16.c
> > > > > because no other architectures add special options there. 
> > > > > Why are we
> > > > > so special?
> > > > Because on the LoongArch architecture, GCC requires the
> > > > addition of
> > > > vectorization options in order to generate vector code. Use the
> > > > check_effective_target_vect_cmdline_needed command in the
> > > > lib/target-
> > > > supports.exp file to set whether the command line option is
> > > > needed to
> > > > enable vectorizations. For example, ia64,x86,aarch64, and riscv
> > > > architectures, vectorization is enabled by default.
> > > 
> > > But no.  The default baseline of 32-bit x86 is i686, which is
> > > basically
> > > a Pentium III launched in 1999 without any vector instructions.
> > > 
> > > We are still missing something here.
> > > 
> > There is a line
> >      #define vector __attribute__((vector_size(4*sizeof(int))))
> > I guess it is the syntax needs to be supported.
> 
> This is always supported.  If the target does not have vector
> instructions GCC will just expand vector arithmetic as a loop.
> 
> Maybe we should just move this test into gcc.dg/vect where the
> framework
> automatically add options like -mlsx or -msse2?
> 

The "-mlsx" option is turned on by default after vectorization testing
is turned on. However, the use of dg-options in some files resets the
compilation options for testing this file. Therefore, to detect
vectorization on LoongArch, it is necessary to add an additional "-
mlsx" option.
  

在 2024/1/15 下午2:42, Xi Ruoyao 写道:
> On Mon, 2024-01-15 at 14:32 +0800, YunQiang Su wrote:
>> Xi Ruoyao <xry111@xry111.site> 于2024年1月15日周一 12:11写道：
>>> On Mon, 2024-01-15 at 09:29 +0800, chenxiaolong wrote:
>>>> At 21:13 +0800 on Saturday, 2024-01-13, Xi Ruoyao wrote：
>>>>> At 15:28 +0800 on Saturday 2024-01-13, chenxiaolong wrote：
>>>>>> gcc/testsuite/ChangeLog:
>>>>>>
>>>>>>    * gcc.dg/pr104992.c: Added additional "-mlsx" compilation
>>>>>> options.
>>>>>>    * gcc.dg/signbit-2.c: Dito.
>>>>>>    * gcc.dg/tree-ssa/scev-16.c: Dito.
>>>>>>    * gfortran.dg/graphite/vect-pr40979.f90: Dito.
>>>>>>    * gfortran.dg/vect/fast-math-mgrid-resid.f: Dito.
>>>>> I don't feel it right about the changes to pr104992.c and scev-16.c
>>>>> because no other architectures add special options there.  Why are we
>>>>> so special?
>>>> Because on the LoongArch architecture, GCC requires the addition of
>>>> vectorization options in order to generate vector code. Use the
>>>> check_effective_target_vect_cmdline_needed command in the lib/target-
>>>> supports.exp file to set whether the command line option is needed to
>>>> enable vectorizations. For example, ia64,x86,aarch64, and riscv
>>>> architectures, vectorization is enabled by default.
>>> But no.  The default baseline of 32-bit x86 is i686, which is basically
>>> a Pentium III launched in 1999 without any vector instructions.
>>>
>>> We are still missing something here.
>>>
>> There is a line
>>       #define vector __attribute__((vector_size(4*sizeof(int))))
>> I guess it is the syntax needs to be supported.
> This is always supported.  If the target does not have vector
> instructions GCC will just expand vector arithmetic as a loop.
>
> Maybe we should just move this test into gcc.dg/vect where the framework
> automatically add options like -mlsx or -msse2?
>
The test contents of pr104992.c and scev-16.c are related to vectorization.

It would be great if these two could be moved to the gcc.dg/vect directory,

but we are not sure if this is allowed to be moved.

If it can be moved, how about modifying it in this patch?
  

On Mon, 2024-01-15 at 15:10 +0800, chenxiaolong wrote:
> At 14:42 +0800 on the first day of 2024-01-15, Xi Ruoyao wrote：
> > On Mon, 2024-01-15 at 14:32 +0800, YunQiang Su wrote:
> > > Xi Ruoyao <xry111@xry111.site> wrote at 12:11pm on Monday, January
> > > 15, 2024：
> > > > On Mon, 2024-01-15 at 09:29 +0800, chenxiaolong wrote:
> > > > > At 21:13 +0800 on Saturday, 2024-01-13, Xi Ruoyao wrote：
> > > > > > At 15:28 +0800 on Saturday 2024-01-13, chenxiaolong wrote：
> > > > > > > gcc/testsuite/ChangeLog:
> > > > > > > 
> > > > > > >    * gcc.dg/pr104992.c: Added additional "-mlsx" compilation
> > > > > > > options.
> > > > > > >    * gcc.dg/signbit-2.c: Dito.
> > > > > > >    * gcc.dg/tree-ssa/scev-16.c: Dito.
> > > > > > >    * gfortran.dg/graphite/vect-pr40979.f90: Dito.
> > > > > > >    * gfortran.dg/vect/fast-math-mgrid-resid.f: Dito.
> > > > > > 
> > > > > > I don't feel it right about the changes to pr104992.c and
> > > > > > scev-16.c
> > > > > > because no other architectures add special options there. 
> > > > > > Why are we
> > > > > > so special?
> > > > > Because on the LoongArch architecture, GCC requires the
> > > > > addition of
> > > > > vectorization options in order to generate vector code. Use the
> > > > > check_effective_target_vect_cmdline_needed command in the
> > > > > lib/target-
> > > > > supports.exp file to set whether the command line option is
> > > > > needed to
> > > > > enable vectorizations. For example, ia64,x86,aarch64, and riscv
> > > > > architectures, vectorization is enabled by default.
> > > > 
> > > > But no.  The default baseline of 32-bit x86 is i686, which is
> > > > basically
> > > > a Pentium III launched in 1999 without any vector instructions.
> > > > 
> > > > We are still missing something here.
> > > > 
> > > There is a line
> > >       #define vector __attribute__((vector_size(4*sizeof(int))))
> > > I guess it is the syntax needs to be supported.
> > 
> > This is always supported.  If the target does not have vector
> > instructions GCC will just expand vector arithmetic as a loop.
> > 
> > Maybe we should just move this test into gcc.dg/vect where the
> > framework
> > automatically add options like -mlsx or -msse2?
> > 
> 
> The "-mlsx" option is turned on by default after vectorization testing
> is turned on. However, the use of dg-options in some files resets the
> compilation options for testing this file. Therefore, to detect
> vectorization on LoongArch, it is necessary to add an additional "-
> mlsx" option.

Then it should use dg-additional-options instead of dg-options.
  

在 2024-01-15一的 15:50 +0800，Xi Ruoyao写道：
> On Mon, 2024-01-15 at 15:10 +0800, chenxiaolong wrote:
> > At 14:42 +0800 on the first day of 2024-01-15, Xi Ruoyao wrote：
> > > On Mon, 2024-01-15 at 14:32 +0800, YunQiang Su wrote:
> > > > Xi Ruoyao <xry111@xry111.site> wrote at 12:11pm on Monday,
> > > > January
> > > > 15, 2024：
> > > > > On Mon, 2024-01-15 at 09:29 +0800, chenxiaolong wrote:
> > > > > > At 21:13 +0800 on Saturday, 2024-01-13, Xi Ruoyao wrote：
> > > > > > > At 15:28 +0800 on Saturday 2024-01-13, chenxiaolong
> > > > > > > wrote：
> > > > > > > > gcc/testsuite/ChangeLog:
> > > > > > > > 
> > > > > > > >    * gcc.dg/pr104992.c: Added additional "-mlsx"
> > > > > > > > compilation
> > > > > > > > options.
> > > > > > > >    * gcc.dg/signbit-2.c: Dito.
> > > > > > > >    * gcc.dg/tree-ssa/scev-16.c: Dito.
> > > > > > > >    * gfortran.dg/graphite/vect-pr40979.f90: Dito.
> > > > > > > >    * gfortran.dg/vect/fast-math-mgrid-resid.f: Dito.
> > > > > > > 
> > > > > > > I don't feel it right about the changes to pr104992.c and
> > > > > > > scev-16.c
> > > > > > > because no other architectures add special options
> > > > > > > there. 
> > > > > > > Why are we
> > > > > > > so special?
> > > > > > Because on the LoongArch architecture, GCC requires the
> > > > > > addition of
> > > > > > vectorization options in order to generate vector code. Use
> > > > > > the
> > > > > > check_effective_target_vect_cmdline_needed command in the
> > > > > > lib/target-
> > > > > > supports.exp file to set whether the command line option is
> > > > > > needed to
> > > > > > enable vectorizations. For example, ia64,x86,aarch64, and
> > > > > > riscv
> > > > > > architectures, vectorization is enabled by default.
> > > > > 
> > > > > But no.  The default baseline of 32-bit x86 is i686, which is
> > > > > basically
> > > > > a Pentium III launched in 1999 without any vector
> > > > > instructions.
> > > > > 
> > > > > We are still missing something here.
> > > > > 
> > > > There is a line
> > > >       #define vector
> > > > __attribute__((vector_size(4*sizeof(int))))
> > > > I guess it is the syntax needs to be supported.
> > > 
> > > This is always supported.  If the target does not have vector
> > > instructions GCC will just expand vector arithmetic as a loop.
> > > 
> > > Maybe we should just move this test into gcc.dg/vect where the
> > > framework
> > > automatically add options like -mlsx or -msse2?
> > > 
> > 
> > The "-mlsx" option is turned on by default after vectorization
> > testing
> > is turned on. However, the use of dg-options in some files resets
> > the
> > compilation options for testing this file. Therefore, to detect
> > vectorization on LoongArch, it is necessary to add an additional "-
> > mlsx" option.
> 
> Then it should use dg-additional-options instead of dg-options.
> 
According to your advice, I have tried the following two ways:

(1)Replace dg-options directly with dg-additional-options. The "-ansi-
pedantic-errors" set in the dg.exp file is used, and the following
problems occur:

gcc.dg/pr104992.c:ISO C90 does not support complex types.
gcc.dg/tree-ssa/scev-16.c:‘for’ loop initial declarations are only
allowed in C99 or C11 mode

Note: The ISO required by the program is inconsistent with the default
standard, resulting in an error.

(2)Move pr104992.c and scev-16.c to the gcc.dg/vect directory and
replace dg-options with dg-additional-options. The problems are as
follows:

gcc.dg/vect/scev-16.c: Because there is no test rule starting with
scev* in the vect.exp file, you need to add a new test rule or change
the file name before the test can be performed.

Summary: It is more appropriate to add the additional "-mlsx" option
directly to the pr104992.c and scev-16.c files. This supports
vectorization  testing of the LoongArch architecture and does not
modify the testing behavior of other architectures.
  

On Tue, 2024-01-16 at 10:57 +0800, chenxiaolong wrote:
> 在 2024-01-15一的 15:50 +0800，Xi Ruoyao写道：
> > On Mon, 2024-01-15 at 15:10 +0800, chenxiaolong wrote:
> > > At 14:42 +0800 on the first day of 2024-01-15, Xi Ruoyao wrote：
> > > > On Mon, 2024-01-15 at 14:32 +0800, YunQiang Su wrote:
> > > > > Xi Ruoyao <xry111@xry111.site> wrote at 12:11pm on Monday,
> > > > > January
> > > > > 15, 2024：
> > > > > > On Mon, 2024-01-15 at 09:29 +0800, chenxiaolong wrote:
> > > > > > > At 21:13 +0800 on Saturday, 2024-01-13, Xi Ruoyao wrote：
> > > > > > > > At 15:28 +0800 on Saturday 2024-01-13, chenxiaolong
> > > > > > > > wrote：
> > > > > > > > > gcc/testsuite/ChangeLog:
> > > > > > > > > 
> > > > > > > > >     * gcc.dg/pr104992.c: Added additional "-mlsx"
> > > > > > > > > compilation
> > > > > > > > > options.
> > > > > > > > >     * gcc.dg/signbit-2.c: Dito.
> > > > > > > > >     * gcc.dg/tree-ssa/scev-16.c: Dito.
> > > > > > > > >     * gfortran.dg/graphite/vect-pr40979.f90: Dito.
> > > > > > > > >     * gfortran.dg/vect/fast-math-mgrid-resid.f: Dito.
> > > > > > > > 
> > > > > > > > I don't feel it right about the changes to pr104992.c and
> > > > > > > > scev-16.c
> > > > > > > > because no other architectures add special options
> > > > > > > > there. 
> > > > > > > > Why are we
> > > > > > > > so special?
> > > > > > > Because on the LoongArch architecture, GCC requires the
> > > > > > > addition of
> > > > > > > vectorization options in order to generate vector code. Use
> > > > > > > the
> > > > > > > check_effective_target_vect_cmdline_needed command in the
> > > > > > > lib/target-
> > > > > > > supports.exp file to set whether the command line option is
> > > > > > > needed to
> > > > > > > enable vectorizations. For example, ia64,x86,aarch64, and
> > > > > > > riscv
> > > > > > > architectures, vectorization is enabled by default.
> > > > > > 
> > > > > > But no.  The default baseline of 32-bit x86 is i686, which is
> > > > > > basically
> > > > > > a Pentium III launched in 1999 without any vector
> > > > > > instructions.
> > > > > > 
> > > > > > We are still missing something here.
> > > > > > 
> > > > > There is a line
> > > > >        #define vector
> > > > > __attribute__((vector_size(4*sizeof(int))))
> > > > > I guess it is the syntax needs to be supported.
> > > > 
> > > > This is always supported.  If the target does not have vector
> > > > instructions GCC will just expand vector arithmetic as a loop.
> > > > 
> > > > Maybe we should just move this test into gcc.dg/vect where the
> > > > framework
> > > > automatically add options like -mlsx or -msse2?
> > > > 
> > > 
> > > The "-mlsx" option is turned on by default after vectorization
> > > testing
> > > is turned on. However, the use of dg-options in some files resets
> > > the
> > > compilation options for testing this file. Therefore, to detect
> > > vectorization on LoongArch, it is necessary to add an additional "-
> > > mlsx" option.
> > 
> > Then it should use dg-additional-options instead of dg-options.
> > 
> According to your advice, I have tried the following two ways:
> 
> (1)Replace dg-options directly with dg-additional-options. The "-ansi-
> pedantic-errors" set in the dg.exp file is used, and the following
> problems occur:
> 
> gcc.dg/pr104992.c:ISO C90 does not support complex types.
> gcc.dg/tree-ssa/scev-16.c:‘for’ loop initial declarations are only
> allowed in C99 or C11 mode
> 
> Note: The ISO required by the program is inconsistent with the default
> standard, resulting in an error.

We can add -std=c11 into dg-additional-options as well.

> (2)Move pr104992.c and scev-16.c to the gcc.dg/vect directory and
> replace dg-options with dg-additional-options. The problems are as
> follows:
> 
> gcc.dg/vect/scev-16.c: Because there is no test rule starting with
> scev* in the vect.exp file, you need to add a new test rule or change
> the file name before the test can be performed.
> 
> Summary: It is more appropriate to add the additional "-mlsx" option
> directly to the pr104992.c and scev-16.c files. This supports
> vectorization  testing of the LoongArch architecture and does not
> modify the testing behavior of other architectures.

No, "not modifying the other architectures" may not be a good thing in
some cases.

There are only two possibilities here:

(1) The test is broken for all architectures where vectorization needs
additional options.  Then we should fix it for all the architectures.

(2) The test is only broken on LoongArch, then on other architectures
some mechanism is already adding the proper options for vectorization. 
Then we should implement the same mechanism for LoongArch.

For either case adding -mlsx only for LoongArch is only papering over
the real issue.

I'll run these tests on some other architectures and see what's
happening...
  

On Tue, 2024-01-16 at 12:58 +0800, Xi Ruoyao wrote:
> On Tue, 2024-01-16 at 10:57 +0800, chenxiaolong wrote:
> > 在 2024-01-15一的 15:50 +0800，Xi Ruoyao写道：
> > > On Mon, 2024-01-15 at 15:10 +0800, chenxiaolong wrote:
> > > > At 14:42 +0800 on the first day of 2024-01-15, Xi Ruoyao wrote：
> > > > > On Mon, 2024-01-15 at 14:32 +0800, YunQiang Su wrote:
> > > > > > Xi Ruoyao <xry111@xry111.site> wrote at 12:11pm on Monday,
> > > > > > January
> > > > > > 15, 2024：
> > > > > > > On Mon, 2024-01-15 at 09:29 +0800, chenxiaolong wrote:
> > > > > > > > At 21:13 +0800 on Saturday, 2024-01-13, Xi Ruoyao wrote：
> > > > > > > > > At 15:28 +0800 on Saturday 2024-01-13, chenxiaolong
> > > > > > > > > wrote：
> > > > > > > > > > gcc/testsuite/ChangeLog:
> > > > > > > > > > 
> > > > > > > > > >     * gcc.dg/pr104992.c: Added additional "-mlsx"
> > > > > > > > > > compilation
> > > > > > > > > > options.
> > > > > > > > > >     * gcc.dg/signbit-2.c: Dito.
> > > > > > > > > >     * gcc.dg/tree-ssa/scev-16.c: Dito.
> > > > > > > > > >     * gfortran.dg/graphite/vect-pr40979.f90: Dito.
> > > > > > > > > >     * gfortran.dg/vect/fast-math-mgrid-resid.f: Dito.
> > > > > > > > > 
> > > > > > > > > I don't feel it right about the changes to pr104992.c and
> > > > > > > > > scev-16.c
> > > > > > > > > because no other architectures add special options
> > > > > > > > > there. 
> > > > > > > > > Why are we
> > > > > > > > > so special?
> > > > > > > > Because on the LoongArch architecture, GCC requires the
> > > > > > > > addition of
> > > > > > > > vectorization options in order to generate vector code. Use
> > > > > > > > the
> > > > > > > > check_effective_target_vect_cmdline_needed command in the
> > > > > > > > lib/target-
> > > > > > > > supports.exp file to set whether the command line option is
> > > > > > > > needed to
> > > > > > > > enable vectorizations. For example, ia64,x86,aarch64, and
> > > > > > > > riscv
> > > > > > > > architectures, vectorization is enabled by default.
> > > > > > > 
> > > > > > > But no.  The default baseline of 32-bit x86 is i686, which is
> > > > > > > basically
> > > > > > > a Pentium III launched in 1999 without any vector
> > > > > > > instructions.
> > > > > > > 
> > > > > > > We are still missing something here.
> > > > > > > 
> > > > > > There is a line
> > > > > >        #define vector
> > > > > > __attribute__((vector_size(4*sizeof(int))))
> > > > > > I guess it is the syntax needs to be supported.
> > > > > 
> > > > > This is always supported.  If the target does not have vector
> > > > > instructions GCC will just expand vector arithmetic as a loop.
> > > > > 
> > > > > Maybe we should just move this test into gcc.dg/vect where the
> > > > > framework
> > > > > automatically add options like -mlsx or -msse2?
> > > > > 
> > > > 
> > > > The "-mlsx" option is turned on by default after vectorization
> > > > testing
> > > > is turned on. However, the use of dg-options in some files resets
> > > > the
> > > > compilation options for testing this file. Therefore, to detect
> > > > vectorization on LoongArch, it is necessary to add an additional "-
> > > > mlsx" option.
> > > 
> > > Then it should use dg-additional-options instead of dg-options.
> > > 
> > According to your advice, I have tried the following two ways:
> > 
> > (1)Replace dg-options directly with dg-additional-options. The "-ansi-
> > pedantic-errors" set in the dg.exp file is used, and the following
> > problems occur:
> > 
> > gcc.dg/pr104992.c:ISO C90 does not support complex types.
> > gcc.dg/tree-ssa/scev-16.c:‘for’ loop initial declarations are only
> > allowed in C99 or C11 mode
> > 
> > Note: The ISO required by the program is inconsistent with the default
> > standard, resulting in an error.
> 
> We can add -std=c11 into dg-additional-options as well.
> 
> > (2)Move pr104992.c and scev-16.c to the gcc.dg/vect directory and
> > replace dg-options with dg-additional-options. The problems are as
> > follows:
> > 
> > gcc.dg/vect/scev-16.c: Because there is no test rule starting with
> > scev* in the vect.exp file, you need to add a new test rule or change
> > the file name before the test can be performed.
> > 
> > Summary: It is more appropriate to add the additional "-mlsx" option
> > directly to the pr104992.c and scev-16.c files. This supports
> > vectorization  testing of the LoongArch architecture and does not
> > modify the testing behavior of other architectures.
> 
> No, "not modifying the other architectures" may not be a good thing in
> some cases.
> 
> There are only two possibilities here:
> 
> (1) The test is broken for all architectures where vectorization needs
> additional options.  Then we should fix it for all the architectures.
> 
> (2) The test is only broken on LoongArch, then on other architectures
> some mechanism is already adding the proper options for vectorization.
> Then we should implement the same mechanism for LoongArch.
> 
> For either case adding -mlsx only for LoongArch is only papering over
> the real issue.
> 
> I'll run these tests on some other architectures and see what's
> happening...

Alright, now to me using vect_* out of vect directories is simply wrong.
Instead of fixing up all the tests one by one, target by target, we
should just stop this nonsense.  Spreading target-specific vectorization
options everywhere is pretty unmaintainable.

https://gcc.gnu.org/PR113418
  

On Tue, Jan 16, 2024 at 5:58 AM Xi Ruoyao <xry111@xry111.site> wrote:
>
> On Tue, 2024-01-16 at 10:57 +0800, chenxiaolong wrote:
> > 在 2024-01-15一的 15:50 +0800，Xi Ruoyao写道：
> > > On Mon, 2024-01-15 at 15:10 +0800, chenxiaolong wrote:
> > > > At 14:42 +0800 on the first day of 2024-01-15, Xi Ruoyao wrote：
> > > > > On Mon, 2024-01-15 at 14:32 +0800, YunQiang Su wrote:
> > > > > > Xi Ruoyao <xry111@xry111.site> wrote at 12:11pm on Monday,
> > > > > > January
> > > > > > 15, 2024：
> > > > > > > On Mon, 2024-01-15 at 09:29 +0800, chenxiaolong wrote:
> > > > > > > > At 21:13 +0800 on Saturday, 2024-01-13, Xi Ruoyao wrote：
> > > > > > > > > At 15:28 +0800 on Saturday 2024-01-13, chenxiaolong
> > > > > > > > > wrote：
> > > > > > > > > > gcc/testsuite/ChangeLog:
> > > > > > > > > >
> > > > > > > > > >     * gcc.dg/pr104992.c: Added additional "-mlsx"
> > > > > > > > > > compilation
> > > > > > > > > > options.
> > > > > > > > > >     * gcc.dg/signbit-2.c: Dito.
> > > > > > > > > >     * gcc.dg/tree-ssa/scev-16.c: Dito.
> > > > > > > > > >     * gfortran.dg/graphite/vect-pr40979.f90: Dito.
> > > > > > > > > >     * gfortran.dg/vect/fast-math-mgrid-resid.f: Dito.
> > > > > > > > >
> > > > > > > > > I don't feel it right about the changes to pr104992.c and
> > > > > > > > > scev-16.c
> > > > > > > > > because no other architectures add special options
> > > > > > > > > there.
> > > > > > > > > Why are we
> > > > > > > > > so special?
> > > > > > > > Because on the LoongArch architecture, GCC requires the
> > > > > > > > addition of
> > > > > > > > vectorization options in order to generate vector code. Use
> > > > > > > > the
> > > > > > > > check_effective_target_vect_cmdline_needed command in the
> > > > > > > > lib/target-
> > > > > > > > supports.exp file to set whether the command line option is
> > > > > > > > needed to
> > > > > > > > enable vectorizations. For example, ia64,x86,aarch64, and
> > > > > > > > riscv
> > > > > > > > architectures, vectorization is enabled by default.
> > > > > > >
> > > > > > > But no.  The default baseline of 32-bit x86 is i686, which is
> > > > > > > basically
> > > > > > > a Pentium III launched in 1999 without any vector
> > > > > > > instructions.
> > > > > > >
> > > > > > > We are still missing something here.
> > > > > > >
> > > > > > There is a line
> > > > > >        #define vector
> > > > > > __attribute__((vector_size(4*sizeof(int))))
> > > > > > I guess it is the syntax needs to be supported.
> > > > >
> > > > > This is always supported.  If the target does not have vector
> > > > > instructions GCC will just expand vector arithmetic as a loop.
> > > > >
> > > > > Maybe we should just move this test into gcc.dg/vect where the
> > > > > framework
> > > > > automatically add options like -mlsx or -msse2?
> > > > >
> > > >
> > > > The "-mlsx" option is turned on by default after vectorization
> > > > testing
> > > > is turned on. However, the use of dg-options in some files resets
> > > > the
> > > > compilation options for testing this file. Therefore, to detect
> > > > vectorization on LoongArch, it is necessary to add an additional "-
> > > > mlsx" option.
> > >
> > > Then it should use dg-additional-options instead of dg-options.
> > >
> > According to your advice, I have tried the following two ways:
> >
> > (1)Replace dg-options directly with dg-additional-options. The "-ansi-
> > pedantic-errors" set in the dg.exp file is used, and the following
> > problems occur:
> >
> > gcc.dg/pr104992.c:ISO C90 does not support complex types.
> > gcc.dg/tree-ssa/scev-16.c:‘for’ loop initial declarations are only
> > allowed in C99 or C11 mode
> >
> > Note: The ISO required by the program is inconsistent with the default
> > standard, resulting in an error.
>
> We can add -std=c11 into dg-additional-options as well.
>
> > (2)Move pr104992.c and scev-16.c to the gcc.dg/vect directory and
> > replace dg-options with dg-additional-options. The problems are as
> > follows:
> >
> > gcc.dg/vect/scev-16.c: Because there is no test rule starting with
> > scev* in the vect.exp file, you need to add a new test rule or change
> > the file name before the test can be performed.

gcc.dg/tree-ssa/scev-16.c is OK to move
gcc.dg/pr104992.c should simply add -fno-tree-vectorize to the used
options and remove the vect_* stuff

> > Summary: It is more appropriate to add the additional "-mlsx" option
> > directly to the pr104992.c and scev-16.c files. This supports
> > vectorization  testing of the LoongArch architecture and does not
> > modify the testing behavior of other architectures.
>
> No, "not modifying the other architectures" may not be a good thing in
> some cases.
>
> There are only two possibilities here:
>
> (1) The test is broken for all architectures where vectorization needs
> additional options.  Then we should fix it for all the architectures.
>
> (2) The test is only broken on LoongArch, then on other architectures
> some mechanism is already adding the proper options for vectorization.
> Then we should implement the same mechanism for LoongArch.
>
> For either case adding -mlsx only for LoongArch is only papering over
> the real issue.
>
> I'll run these tests on some other architectures and see what's
> happening...
>
> --
> Xi Ruoyao <xry111@xry111.site>
> School of Aerospace Science and Technology, Xidian University
  

> gcc.dg/tree-ssa/scev-16.c is OK to move
> gcc.dg/pr104992.c should simply add -fno-tree-vectorize to the used
> options and remove the vect_* stuff

Hi Richard:

I have a question. I don't understand the purpose of adding 
'-fno-tree-vectorize' here.

Thanks!
  

On Thu, 2024-01-18 at 15:15 +0800, chenglulu wrote:

> > gcc.dg/tree-ssa/scev-16.c is OK to move
> > gcc.dg/pr104992.c should simply add -fno-tree-vectorize to the used
> > options and remove the vect_* stuff
> 
> Hi Richard:
> 
> I have a question. I don't understand the purpose of adding 
> '-fno-tree-vectorize' here.

I don't think -fno-tree-vectorize will make a difference here.  This
test case uses __attribute__((vector_size(...))) explicitly so the
vector operation will be used even if -fno-tree-vectorize.
  

在 2024/1/18 下午3:44, Xi Ruoyao 写道:
> On Thu, 2024-01-18 at 15:15 +0800, chenglulu wrote:
>
>>> gcc.dg/tree-ssa/scev-16.c is OK to move
>>> gcc.dg/pr104992.c should simply add -fno-tree-vectorize to the used
>>> options and remove the vect_* stuff
>> Hi Richard:
>>
>> I have a question. I don't understand the purpose of adding
>> '-fno-tree-vectorize' here.
> I don't think -fno-tree-vectorize will make a difference here.  This
> test case uses __attribute__((vector_size(...))) explicitly so the
> vector operation will be used even if -fno-tree-vectorize.
>
Yes, I did the test and compared the intermediate results and saw no 
difference.

“remove the vect_* stuff”，I don’t quite understand what it means either.:-(
  

在 2024/1/18 下午4:49, chenglulu 写道:
>
> 在 2024/1/18 下午3:44, Xi Ruoyao 写道:
>> On Thu, 2024-01-18 at 15:15 +0800, chenglulu wrote:
>>
>>>> gcc.dg/tree-ssa/scev-16.c is OK to move
>>>> gcc.dg/pr104992.c should simply add -fno-tree-vectorize to the used
>>>> options and remove the vect_* stuff
>>> Hi Richard:
>>>
>>> I have a question. I don't understand the purpose of adding
>>> '-fno-tree-vectorize' here.
>> I don't think -fno-tree-vectorize will make a difference here. This
>> test case uses __attribute__((vector_size(...))) explicitly so the
>> vector operation will be used even if -fno-tree-vectorize.
>>
> Yes, I did the test and compared the intermediate results and saw no 
> difference.
>
> “remove the vect_* stuff”，I don’t quite understand what it means 
> either.:-(
>
The test case scev-16.c was moved to the vect directory in r14-8210.