[1/2] LoongArch: Add the macro implementation of mcmodel=extreme.
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Commit Message
gcc/ChangeLog:
* config/loongarch/loongarch.cc (loongarch_symbolic_constant_p):
Remove the sym+addend form from the SYMBOL_PCREL64 type symbol.
(loongarch_option_override_internal): Supports option combinations
of -cmodel=extreme and -mexplicit-relocs=none.
(loongarch_handle_model_attribute): Remove detection code.
* config/loongarch/loongarch.md (movdi_pcrel64): New templated.
(movdi_got_disp): Likewise.
* config/loongarch/predicates.md (symbolic_got_operand): Determine
whether the symbol type is SYMBOL_GOT_DISP.
(symbolic_pcrel64_operand): Determine whether the symbol type is
SYMBOL_PCREL64.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/func-call-extreme-5.c: New test.
* gcc.target/loongarch/func-call-extreme-6.c: New test.
---
gcc/config/loongarch/loongarch.cc | 14 +-----
gcc/config/loongarch/loongarch.md | 47 ++++++++++++++++++-
gcc/config/loongarch/predicates.md | 14 ++++++
.../loongarch/func-call-extreme-5.c | 7 +++
.../loongarch/func-call-extreme-6.c | 7 +++
5 files changed, 75 insertions(+), 14 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/loongarch/func-call-extreme-5.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/func-call-extreme-6.c
Comments
On Wed, 2023-12-27 at 16:46 +0800, Lulu Cheng wrote:
> +(define_insn "movdi_pcrel64"
> + [(set (match_operand:DI 0 "register_operand" "=&r")
> + (match_operand:DI 1 "symbolic_pcrel64_operand"))
> + (unspec:DI [(const_int 0)]
> + UNSPEC_MOV_PCREL64)
> + (use (reg:DI T3_REGNUM))
> + (clobber (reg:DI T3_REGNUM))]
It's better not to hard code $t3 here. We can write
[(set (match_operand:DI 0 "register_operand" "=r")
(match_operand:DI 1 "symbolic_pcrel64_operand"))
(clobber (match_operand:DI 2 "register_operand "=&r"))]
And use
gen_movdi_pcrel64 (operands[0], operands[1], gen_reg_rtx(DImode))
in expand.
> + "TARGET_64BIT"
> + "la.local %0,$r15,%1"
> + [(set_attr "mode" "DI")
> + (set_attr "length" "5")])
在 2024/1/4 上午11:51, Xi Ruoyao 写道:
> On Wed, 2023-12-27 at 16:46 +0800, Lulu Cheng wrote:
>> +(define_insn "movdi_pcrel64"
>> + [(set (match_operand:DI 0 "register_operand" "=&r")
>> + (match_operand:DI 1 "symbolic_pcrel64_operand"))
>> + (unspec:DI [(const_int 0)]
>> + UNSPEC_MOV_PCREL64)
>> + (use (reg:DI T3_REGNUM))
>> + (clobber (reg:DI T3_REGNUM))]
> It's better not to hard code $t3 here. We can write
>
> [(set (match_operand:DI 0 "register_operand" "=r")
> (match_operand:DI 1 "symbolic_pcrel64_operand"))
> (clobber (match_operand:DI 2 "register_operand "=&r"))]
>
> And use
>
> gen_movdi_pcrel64 (operands[0], operands[1], gen_reg_rtx(DImode))
>
> in expand.
>
I tried using (clobber (match_scratch)) when implementing it, but it
didn't work.
I will try this implementation now, thank you!
>> + "TARGET_64BIT"
>> + "la.local %0,$r15,%1"
>> + [(set_attr "mode" "DI")
>> + (set_attr "length" "5")])
On Thu, 2024-01-04 at 11:58 +0800, chenglulu wrote:
>
> 在 2024/1/4 上午11:51, Xi Ruoyao 写道:
> > On Wed, 2023-12-27 at 16:46 +0800, Lulu Cheng wrote:
> > > +(define_insn "movdi_pcrel64"
> > > + [(set (match_operand:DI 0 "register_operand" "=&r")
> > > + (match_operand:DI 1 "symbolic_pcrel64_operand"))
> > > + (unspec:DI [(const_int 0)]
> > > + UNSPEC_MOV_PCREL64)
> > > + (use (reg:DI T3_REGNUM))
> > > + (clobber (reg:DI T3_REGNUM))]
> > It's better not to hard code $t3 here. We can write
> >
> > [(set (match_operand:DI 0 "register_operand" "=r")
> > (match_operand:DI 1 "symbolic_pcrel64_operand"))
> > (clobber (match_operand:DI 2 "register_operand "=&r"))]
> >
> > And use
> >
> > gen_movdi_pcrel64 (operands[0], operands[1], gen_reg_rtx(DImode))
> >
> > in expand.
> >
> I tried using (clobber (match_scratch)) when implementing it, but it
> didn't work.
I tried match_scratch a few times as well in my previous hacks but never
succeeded :(.
在 2024/1/4 下午5:05, chenglulu 写道:
>
> 在 2024/1/4 下午12:05, Xi Ruoyao 写道:
>> On Thu, 2024-01-04 at 11:58 +0800, chenglulu wrote:
>>> 在 2024/1/4 上午11:51, Xi Ruoyao 写道:
>>>> On Wed, 2023-12-27 at 16:46 +0800, Lulu Cheng wrote:
>>>>> +(define_insn "movdi_pcrel64"
>>>>> + [(set (match_operand:DI 0 "register_operand" "=&r")
>>>>> + (match_operand:DI 1 "symbolic_pcrel64_operand"))
>>>>> + (unspec:DI [(const_int 0)]
>>>>> + UNSPEC_MOV_PCREL64)
>>>>> + (use (reg:DI T3_REGNUM))
>>>>> + (clobber (reg:DI T3_REGNUM))]
>>>> It's better not to hard code $t3 here. We can write
>>>>
>>>> [(set (match_operand:DI 0 "register_operand" "=r")
>>>> (match_operand:DI 1 "symbolic_pcrel64_operand"))
>>>> (clobber (match_operand:DI 2 "register_operand "=&r"))]
>>>>
>>>> And use
>>>>
>>>> gen_movdi_pcrel64 (operands[0], operands[1], gen_reg_rtx(DImode))
>>>>
>>>> in expand.
>>>>
>>> I tried using (clobber (match_scratch)) when implementing it, but it
>>> didn't work.
>> I tried match_scratch a few times as well in my previous hacks but never
>> succeeded :(.
>>
> In the function loongarch_output_mi_thunk, the address of the symbol
> .LTHUNK0
>
> will be obtained, but at this time it is no longer possible to apply
> for temporary variables.
>
> So there will be ICE here
>
> See attachment for test cases.
>
> The compilation command is as follows:
>
> $ ./gcc/cc1plus -fpreprocessed example.ii -quiet -dumpbase example.cc
> -dumpbase-ext .cc -mexplicit-relocs=none -mno-relax -mabi=lp64d
> -march=loongarch64 -mfpu=64 -msimd=lasx -mcmodel=extreme
> -mtune=loongarch64 -g3 -O2 -Wno-int-conversion -Wno-implicit-int
> -Wno-implicit-function-declaration -Wno-incompatible-pointer-types
> -std=c++98 -version -o example.s
>
>
>
I have now made the following modifications and are testing for correctness:
@@ -7450,12 +7450,22 @@ loongarch_output_mi_thunk (FILE *file, tree
thunk_fndecl ATTRIBUTE_UNUSED,
allowed, otherwise load the address into a register first. */
if (use_sibcall_p)
{
- insn = emit_call_insn (gen_sibcall_internal (fnaddr, const0_rtx));
+ if (TARGET_CMODEL_EXTREME)
+ {
+ emit_insn (gen_movdi_pcrel64 (temp1, fnaddr, temp2));
+ insn = emit_call_insn (gen_sibcall_internal (temp1, const0_rtx));
+ }
+ else
+ insn = emit_call_insn (gen_sibcall_internal (fnaddr, const0_rtx));
SIBLING_CALL_P (insn) = 1;
}
else
{
- loongarch_emit_move (temp1, fnaddr);
+ if (TARGET_CMODEL_EXTREME)
+ emit_insn (gen_movdi_pcrel64 (temp1, fnaddr, temp2));
+ else
+ loongarch_emit_move (temp1, fnaddr);
+
emit_jump_insn (gen_indirect_jump (temp1));
}
@@ -1944,10 +1944,10 @@ loongarch_symbolic_constant_p (rtx x, enum loongarch_symbol_type *symbol_type)
case SYMBOL_TLSGD:
case SYMBOL_TLSLDM:
case SYMBOL_PCREL:
- case SYMBOL_PCREL64:
/* GAS rejects offsets outside the range [-2^31, 2^31-1]. */
return sext_hwi (INTVAL (offset), 32) == INTVAL (offset);
+ case SYMBOL_PCREL64:
case SYMBOL_GOT_DISP:
case SYMBOL_TLS:
return false;
@@ -7526,10 +7526,6 @@ loongarch_option_override_internal (struct gcc_options *opts,
switch (la_target.cmodel)
{
case CMODEL_EXTREME:
- if (la_opt_explicit_relocs == EXPLICIT_RELOCS_NONE)
- error ("code model %qs is not compatible with %s",
- "extreme", "-mexplicit-relocs=none");
-
if (opts->x_flag_plt)
{
if (global_options_set.x_flag_plt)
@@ -7894,14 +7890,6 @@ loongarch_handle_model_attribute (tree *node, tree name, tree arg, int,
*no_add_attrs = true;
return NULL_TREE;
}
- if (la_opt_explicit_relocs == EXPLICIT_RELOCS_NONE)
- {
- error_at (DECL_SOURCE_LOCATION (decl),
- "%qE attribute is not compatible with %s", name,
- "-mexplicit-relocs=none");
- *no_add_attrs = true;
- return NULL_TREE;
- }
arg = TREE_VALUE (arg);
if (TREE_CODE (arg) != STRING_CST)
@@ -84,6 +84,9 @@ (define_c_enum "unspec" [
UNSPEC_SIBCALL_VALUE_MULTIPLE_INTERNAL_1
UNSPEC_CALL_VALUE_MULTIPLE_INTERNAL_1
+
+ UNSPEC_MOV_PCREL64
+ UNSPEC_MOV_GOT_DISP
])
(define_c_enum "unspecv" [
@@ -123,6 +126,7 @@ (define_constants
(TP_REGNUM 2)
(T0_REGNUM 12)
(T1_REGNUM 13)
+ (T3_REGNUM 15)
(S0_REGNUM 23)
;; Return path styles
@@ -2056,8 +2060,22 @@ (define_expand "movdi"
{
if (loongarch_legitimize_move (DImode, operands[0], operands[1]))
DONE;
-})
+ enum loongarch_symbol_type symbol_type;
+ if (loongarch_symbolic_constant_p (operands[1], &symbol_type))
+ {
+ if (symbol_type == SYMBOL_PCREL64)
+ {
+ emit_insn (gen_movdi_pcrel64 (operands[0], operands[1]));
+ DONE;
+ }
+ else if (TARGET_CMODEL_EXTREME && symbol_type == SYMBOL_GOT_DISP)
+ {
+ emit_insn (gen_movdi_got_disp (operands[0], operands[1]));
+ DONE;
+ }
+ }
+})
(define_insn_and_split "*movdi_32bit"
[(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,r,w,*f,*f,*r,*m")
(match_operand:DI 1 "move_operand" "r,i,w,r,*J*r,*m,*f,*f"))]
@@ -2096,6 +2114,33 @@ (define_insn_and_split "*movdi_64bit"
[(set_attr "move_type" "move,const,load,store,mgtf,fpload,mftg,fpstore")
(set_attr "mode" "DI")])
+;; $t0 and $t1 are used in loongarch_output_mi_thunk. If $t0 or $t1 is used
+;; here, then when cmodel is extreme, C++ THUNK will error. So $t3 is selected
+;; here.
+(define_insn "movdi_pcrel64"
+ [(set (match_operand:DI 0 "register_operand" "=&r")
+ (match_operand:DI 1 "symbolic_pcrel64_operand"))
+ (unspec:DI [(const_int 0)]
+ UNSPEC_MOV_PCREL64)
+ (use (reg:DI T3_REGNUM))
+ (clobber (reg:DI T3_REGNUM))]
+ "TARGET_64BIT"
+ "la.local %0,$r15,%1"
+ [(set_attr "mode" "DI")
+ (set_attr "length" "5")])
+
+(define_insn "movdi_got_disp"
+ [(set (match_operand:DI 0 "register_operand" "=&r")
+ (match_operand:DI 1 "symbolic_got_operand"))
+ (unspec:DI [(const_int 0)]
+ UNSPEC_MOV_GOT_DISP)
+ (use (reg:DI T3_REGNUM))
+ (clobber (reg:DI T3_REGNUM))]
+ "TARGET_64BIT && TARGET_CMODEL_EXTREME"
+ "la.global %0,$r15,%1"
+ [(set_attr "mode" "DI")
+ (set_attr "length" "5")])
+
;; 32-bit Integer moves
(define_expand "movsi"
@@ -579,6 +579,20 @@ (define_predicate "symbolic_pcrel_operand"
return loongarch_symbolic_constant_p (op, &type) && type == SYMBOL_PCREL;
})
+(define_predicate "symbolic_got_operand"
+ (match_code "const,symbol_ref,label_ref")
+{
+ enum loongarch_symbol_type type;
+ return loongarch_symbolic_constant_p (op, &type) && type == SYMBOL_GOT_DISP;
+})
+
+(define_predicate "symbolic_pcrel64_operand"
+ (match_code "const,symbol_ref,label_ref")
+{
+ enum loongarch_symbol_type type;
+ return loongarch_symbolic_constant_p (op, &type) && type == SYMBOL_PCREL64;
+})
+
(define_predicate "equality_operator"
(match_code "eq,ne"))
new file mode 100644
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-mabi=lp64d -O0 -fpic -fno-plt -mexplicit-relocs=none -mcmodel=extreme" } */
+/* { dg-final { scan-assembler "test:.*la.global.*,\\\$r15,g" } } */
+/* { dg-final { scan-assembler "test1:.*la.global.*,\\\$r15,f" } } */
+/* { dg-final { scan-assembler "test2:.*la.local.*,\\\$r15,l" } } */
+
+#include "func-call-extreme-1.c"
new file mode 100644
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-mabi=lp64d -O0 -fno-pic -fno-plt -mexplicit-relocs=none -mcmodel=extreme" } */
+/* { dg-final { scan-assembler "test:.*la.global.*,\\\$r15,g" } } */
+/* { dg-final { scan-assembler "test1:.*la.local.*,\\\$r15,f" } } */
+/* { dg-final { scan-assembler "test2:.*la.local.*,\\\$r15,l" } } */
+
+#include "func-call-extreme-1.c"