[v1] RISC-V: Fix one typo in full-vec-movel test
Checks
Context |
Check |
Description |
linaro-tcwg-bot/tcwg_gcc_check--master-aarch64 |
success
|
Testing passed
|
Commit Message
From: Pan Li <pan2.li@intel.com>
This patch would like to fix one typo when checking assembly of
full-vec-movel.
Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vls-vlmax/full-vec-move1.c:
Adjust dg-do to comiple for asm checking.
---
.../gcc.target/riscv/rvv/autovec/vls-vlmax/full-vec-move1.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Comments
> This patch would like to fix one typo when checking assembly of
> full-vec-movel.
OK. (I actually intended to commit this myself adding some more
comments to the iterator change as well as fix the tests, but well...)
Regards
Robin
Oh. Sorry. Since I want to commit my patch so I asked Pan to commit your test as well.
I think you can resend a fix of this testcase and drop this patch.
juzhe.zhong@rivai.ai
From: Robin Dapp
Date: 2023-06-13 15:20
To: pan2.li; gcc-patches
CC: rdapp.gcc; juzhe.zhong; jeffreyalaw; yanzhang.wang; kito.cheng
Subject: Re: [PATCH v1] RISC-V: Fix one typo in full-vec-movel test
> This patch would like to fix one typo when checking assembly of
> full-vec-movel.
OK. (I actually intended to commit this myself adding some more
comments to the iterator change as well as fix the tests, but well...)
Regards
Robin
> Oh. Sorry. Since I want to commit my patch so I asked Pan to commit
> your test as well. I think you can resend a fix of this testcase and
> drop this patch.
No problem, will fix it another time. Pan can just go ahead with this
fix now, no need to wait for a maintainer, it's obvious enough.
Thanks
Robin
Committed, thanks Robin and Juzhe.
Pan
-----Original Message-----
From: Robin Dapp <rdapp.gcc@gmail.com>
Sent: Tuesday, June 13, 2023 3:24 PM
To: juzhe.zhong@rivai.ai; Li, Pan2 <pan2.li@intel.com>; gcc-patches <gcc-patches@gcc.gnu.org>
Cc: rdapp.gcc@gmail.com; jeffreyalaw <jeffreyalaw@gmail.com>; Wang, Yanzhang <yanzhang.wang@intel.com>; kito.cheng <kito.cheng@gmail.com>
Subject: Re: [PATCH v1] RISC-V: Fix one typo in full-vec-movel test
> Oh. Sorry. Since I want to commit my patch so I asked Pan to commit
> your test as well. I think you can resend a fix of this testcase and
> drop this patch.
No problem, will fix it another time. Pan can just go ahead with this fix now, no need to wait for a maintainer, it's obvious enough.
Thanks
Robin
@@ -1,4 +1,4 @@
-/* { dg-do run { target { riscv_vector } } } */
+/* { dg-do compile } */
/* { dg-additional-options "-std=c99 -O3 -march=rv64gcv_zvl128b -fno-vect-cost-model --param=riscv-autovec-preference=fixed-vlmax" } */
#include <stdint-gcc.h>