[v2] aarch64: Add pattern for bswap + rotate [PR 110039]
Commit Message
After commit g:d8545fb2c71683f407bfd96706103297d4d6e27b, we missed a
pattern to match the new GIMPLE form.
With this patch, gcc.target/aarch64/rev16_2.c passes again.
2023-05-31 Christophe Lyon <christophe.lyon@linaro.org>
PR target/110039
gcc/
* config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
pattern.
---
gcc/config/aarch64/aarch64.md | 10 ++++++++++
1 file changed, 10 insertions(+)
Comments
Christophe Lyon <christophe.lyon@linaro.org> writes:
> After commit g:d8545fb2c71683f407bfd96706103297d4d6e27b, we missed a
> pattern to match the new GIMPLE form.
>
> With this patch, gcc.target/aarch64/rev16_2.c passes again.
>
> 2023-05-31 Christophe Lyon <christophe.lyon@linaro.org>
>
> PR target/110039
> gcc/
> * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
> pattern.
OK, thanks.
Richard
> ---
> gcc/config/aarch64/aarch64.md | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
> index 8b8951d7b14..9af7024da43 100644
> --- a/gcc/config/aarch64/aarch64.md
> +++ b/gcc/config/aarch64/aarch64.md
> @@ -6267,6 +6267,16 @@
> [(set_attr "type" "rev")]
> )
>
> +;; Similar pattern to match (rotate (bswap) 16)
> +(define_insn "aarch64_rev16si2_alt3"
> + [(set (match_operand:SI 0 "register_operand" "=r")
> + (rotate:SI (bswap:SI (match_operand:SI 1 "register_operand" "r"))
> + (const_int 16)))]
> + ""
> + "rev16\\t%w0, %w1"
> + [(set_attr "type" "rev")]
> +)
> +
> ;; zero_extend version of above
> (define_insn "*bswapsi2_uxtw"
> [(set (match_operand:DI 0 "register_operand" "=r")
@@ -6267,6 +6267,16 @@
[(set_attr "type" "rev")]
)
+;; Similar pattern to match (rotate (bswap) 16)
+(define_insn "aarch64_rev16si2_alt3"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (rotate:SI (bswap:SI (match_operand:SI 1 "register_operand" "r"))
+ (const_int 16)))]
+ ""
+ "rev16\\t%w0, %w1"
+ [(set_attr "type" "rev")]
+)
+
;; zero_extend version of above
(define_insn "*bswapsi2_uxtw"
[(set (match_operand:DI 0 "register_operand" "=r")