diff mbox series

[v4,1/4] RISC-V: Minimal support of z*inx extension.

Message ID 20221020093235.5071-2-jiawei@iscas.ac.cn
State Committed
Commit e09335728d3f9bc177eac2f7dff79715e0aa67c9
Headers
Series RISC-V: Support z*inx extensions. |

Commit Message

Jiawei Oct. 20, 2022, 9:32 a.m. UTC 
  From: Jiawei <jiawei@iscas.ac.cn>

Minimal support of z*inx extension, include 'zfinx'， 'zdinx' and 'zhinx/zhinxmin'
corresponding to 'f', 'd' and 'zfh/zfhmin', the 'zdinx' will imply 'zfinx'
same as 'd' imply 'f', 'zhinx' will aslo imply 'zfinx', all zfinx extension imply 'zicsr'.

Co-Authored-By: Sinan Lin.

gcc/ChangeLog:

        * common/config/riscv/riscv-common.cc: New extensions.
        * config/riscv/arch-canonicalize: New imply relations.
        * config/riscv/riscv-opts.h (MASK_ZFINX): New mask.
        (MASK_ZDINX): Ditto.
        (MASK_ZHINX): Ditto.
        (MASK_ZHINXMIN): Ditto.
        (TARGET_ZFINX): New target.
        (TARGET_ZDINX): Ditto.
        (TARGET_ZHINX): Ditto.
        (TARGET_ZHINXMIN): Ditto.
        * config/riscv/riscv.opt: New target variable.

---
 gcc/common/config/riscv/riscv-common.cc | 18 ++++++++++++++++++
 gcc/config/riscv/arch-canonicalize      |  5 +++++
 gcc/config/riscv/riscv-opts.h           | 10 ++++++++++
 gcc/config/riscv/riscv.opt              |  3 +++
 4 files changed, 36 insertions(+)
diff mbox series

Patch

diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc
index c39ed2e2696..55f3328df7a 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -51,6 +51,11 @@  static const riscv_implied_info_t riscv_implied_info[] =
   {"d", "f"},
   {"f", "zicsr"},
   {"d", "zicsr"},
+
+  {"zdinx", "zfinx"},
+  {"zfinx", "zicsr"},
+  {"zdinx", "zicsr"},
+
   {"zk", "zkn"},
   {"zk", "zkr"},
   {"zk", "zkt"},
@@ -99,6 +104,9 @@  static const riscv_implied_info_t riscv_implied_info[] =
 
   {"zfh", "zfhmin"},
   {"zfhmin", "f"},
+  
+  {"zhinx", "zhinxmin"},
+  {"zhinxmin", "zfinx"},
 
   {NULL, NULL}
 };
@@ -158,6 +166,11 @@  static const struct riscv_ext_version riscv_ext_version_table[] =
   {"zbc", ISA_SPEC_CLASS_NONE, 1, 0},
   {"zbs", ISA_SPEC_CLASS_NONE, 1, 0},
 
+  {"zfinx", ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zdinx", ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zhinx", ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zhinxmin", ISA_SPEC_CLASS_NONE, 1, 0},
+
   {"zbkb",  ISA_SPEC_CLASS_NONE, 1, 0},
   {"zbkc",  ISA_SPEC_CLASS_NONE, 1, 0},
   {"zbkx",  ISA_SPEC_CLASS_NONE, 1, 0},
@@ -1168,6 +1181,11 @@  static const riscv_ext_flag_table_t riscv_ext_flag_table[] =
   {"zbc",    &gcc_options::x_riscv_zb_subext, MASK_ZBC},
   {"zbs",    &gcc_options::x_riscv_zb_subext, MASK_ZBS},
 
+  {"zfinx",    &gcc_options::x_riscv_zinx_subext, MASK_ZFINX},
+  {"zdinx",    &gcc_options::x_riscv_zinx_subext, MASK_ZDINX},
+  {"zhinx",    &gcc_options::x_riscv_zinx_subext, MASK_ZHINX},
+  {"zhinxmin", &gcc_options::x_riscv_zinx_subext, MASK_ZHINXMIN},
+
   {"zbkb",   &gcc_options::x_riscv_zk_subext, MASK_ZBKB},
   {"zbkc",   &gcc_options::x_riscv_zk_subext, MASK_ZBKC},
   {"zbkx",   &gcc_options::x_riscv_zk_subext, MASK_ZBKX},
diff --git a/gcc/config/riscv/arch-canonicalize b/gcc/config/riscv/arch-canonicalize
index fd7651ac491..2498db506b7 100755
--- a/gcc/config/riscv/arch-canonicalize
+++ b/gcc/config/riscv/arch-canonicalize
@@ -41,6 +41,11 @@  LONG_EXT_PREFIXES = ['z', 's', 'h', 'x']
 IMPLIED_EXT = {
   "d" : ["f", "zicsr"],
   "f" : ["zicsr"],
+  "zdinx" : ["zfinx", "zicsr"],
+  "zfinx" : ["zicsr"],
+  "zhinx" : ["zhinxmin", "zfinx", "zicsr"],
+  "zhinxmin" : ["zfinx", "zicsr"],
+
   "zk" : ["zkn", "zkr", "zkt"],
   "zkn" : ["zbkb", "zbkc", "zbkx", "zkne", "zknd", "zknh"],
   "zks" : ["zbkb", "zbkc", "zbkx", "zksed", "zksh"],
diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
index 55e0bc0a0e9..bb2322ad182 100644
--- a/gcc/config/riscv/riscv-opts.h
+++ b/gcc/config/riscv/riscv-opts.h
@@ -83,6 +83,16 @@  enum stack_protector_guard {
 #define TARGET_ZBC    ((riscv_zb_subext & MASK_ZBC) != 0)
 #define TARGET_ZBS    ((riscv_zb_subext & MASK_ZBS) != 0)
 
+#define MASK_ZFINX      (1 << 0)
+#define MASK_ZDINX      (1 << 1)
+#define MASK_ZHINX      (1 << 2)
+#define MASK_ZHINXMIN   (1 << 3)
+
+#define TARGET_ZFINX    ((riscv_zinx_subext & MASK_ZFINX) != 0)
+#define TARGET_ZDINX    ((riscv_zinx_subext & MASK_ZDINX) != 0)
+#define TARGET_ZHINX    ((riscv_zinx_subext & MASK_ZHINX) != 0)
+#define TARGET_ZHINXMIN ((riscv_zinx_subext & MASK_ZHINXMIN) != 0)
+
 #define MASK_ZBKB     (1 << 0)
 #define MASK_ZBKC     (1 << 1)
 #define MASK_ZBKX     (1 << 2)
diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
index 8923a11a97d..7c1e0ed5f2d 100644
--- a/gcc/config/riscv/riscv.opt
+++ b/gcc/config/riscv/riscv.opt
@@ -206,6 +206,9 @@  int riscv_zi_subext
 TargetVariable
 int riscv_zb_subext
 
+TargetVariable
+int riscv_zinx_subext
+
 TargetVariable
 int riscv_zk_subext