[V2] RISC-V:Fix a bug that is the CMO builtins are missing parameter

Message ID 20220607080329.12581-1-shiyulong@iscas.ac.cn
State Deferred, archived
Headers
Series [V2] RISC-V:Fix a bug that is the CMO builtins are missing parameter |

Commit Message

yulong June 7, 2022, 8:03 a.m. UTC
  From: yulong <shiyulong@iscas.ac.cn>

We changed builtins format about zicbom and zicboz subextensions and added test cases.
  

Comments

Kito Cheng June 7, 2022, 10 a.m. UTC | #1
On Tue, Jun 7, 2022 at 4:04 PM <shiyulong@iscas.ac.cn> wrote:
>
> From: yulong <shiyulong@iscas.ac.cn>
>
> We changed builtins format about zicbom and zicboz subextensions and added test cases.
> diff with the previous version:
> 1.We deleted the RLT mode's second input operand.
> 2.We modified the type of builtins from RISCV_BUILTIN_DIRECT to RISCV_BUILTIN_DIRECT_NO_TARGET.
> 3.We modified the test cases and added more parameter tests.
>
> Thanks, Simon and Kito.
>
> gcc/ChangeLog:
>
>         * config/riscv/riscv-cmo.def (RISCV_BUILTIN): changed BUILTIN_TYPE and FUNCTION_TYPE
>         * config/riscv/riscv-ftypes.def (0): changed "DEF_RISCV_FTYPE (0, (SI/DI))" to "DEF_RISCV_FTYPE (1, (VOID, SI/DI))"
>         (1):
>
> gcc/testsuite/ChangeLog:
>
>         * gcc.target/riscv/cmo-zicbom-1.c: added parameter and modified the fun's type
>         * gcc.target/riscv/cmo-zicbom-2.c: added parameter and modified the fun's type
>         * gcc.target/riscv/cmo-zicboz-1.c: added parameter and modified the fun's type
>         * gcc.target/riscv/cmo-zicboz-2.c: added parameter and modified the fun's type
>
> ---
>  gcc/config/riscv/riscv-cmo.def                | 16 ++++++------
>  gcc/config/riscv/riscv-ftypes.def             |  4 +--
>  gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c | 25 ++++++++++++-------
>  gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c | 25 ++++++++++++-------
>  gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c |  9 ++++---
>  gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c |  9 ++++---
>  6 files changed, 54 insertions(+), 34 deletions(-)
>
> diff --git a/gcc/config/riscv/riscv-cmo.def b/gcc/config/riscv/riscv-cmo.def
> index b30ecf96ec1..7b3da7c24ef 100644
> --- a/gcc/config/riscv/riscv-cmo.def
> +++ b/gcc/config/riscv/riscv-cmo.def
> @@ -1,16 +1,16 @@
>  // zicbom
> -RISCV_BUILTIN (clean_si, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, clean32),
> -RISCV_BUILTIN (clean_di, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, clean64),
> +RISCV_BUILTIN (clean_si, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_SI, clean32),
> +RISCV_BUILTIN (clean_di, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_DI, clean64),

Seems like that could be void * type rather than SI or DI here

RISCV_VOID_FTYPE_SI -> RISCV_VOID_FTYPE_VOID_PTR
RISCV_VOID_FTYPE_DI -> RISCV_VOID_FTYPE_VOID_PTR

And add RISCV_ATYPE_VOID_PTR here

diff --git a/gcc/config/riscv/riscv-builtins.cc
b/gcc/config/riscv/riscv-builtins.cc
index 795132a0c16..1218fdfc67d 100644
--- a/gcc/config/riscv/riscv-builtins.cc
+++ b/gcc/config/riscv/riscv-builtins.cc
@@ -133,6 +133,7 @@ AVAIL (prefetchi64, TARGET_ZICBOP && TARGET_64BIT)
#define RISCV_ATYPE_USI unsigned_intSI_type_node
#define RISCV_ATYPE_SI intSI_type_node
#define RISCV_ATYPE_DI intDI_type_node
+#define RISCV_ATYPE_VOID_PTR ptr_type_node

/* RISCV_FTYPE_ATYPESN takes N RISCV_FTYPES-like type codes and lists
   their associated RISCV_ATYPEs.  */


And function type here.

diff --git a/gcc/config/riscv/riscv-ftypes.def
b/gcc/config/riscv/riscv-ftypes.def
index 77ac6ea3f66..7c40ac89a4a 100644
--- a/gcc/config/riscv/riscv-ftypes.def
+++ b/gcc/config/riscv/riscv-ftypes.def
@@ -30,5 +30,6 @@ DEF_RISCV_FTYPE (0, (USI))
DEF_RISCV_FTYPE (1, (VOID, USI))
DEF_RISCV_FTYPE (1, (VOID, SI))
DEF_RISCV_FTYPE (1, (VOID, DI))
+DEF_RISCV_FTYPE (1, (VOID, VOID_PTR))
DEF_RISCV_FTYPE (1, (SI, SI))
DEF_RISCV_FTYPE (1, (DI, DI))



>
> -RISCV_BUILTIN (flush_si, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, flush32),
> -RISCV_BUILTIN (flush_di, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, flush64),
> +RISCV_BUILTIN (flush_si, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_SI, flush32),
> +RISCV_BUILTIN (flush_di, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_DI, flush64),
>
> -RISCV_BUILTIN (inval_si, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, inval32),
> -RISCV_BUILTIN (inval_di, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, inval64),
> +RISCV_BUILTIN (inval_si, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_SI, inval32),
> +RISCV_BUILTIN (inval_di, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_DI, inval64),
>
>  // zicboz
> -RISCV_BUILTIN (zero_si, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, zero32),
> -RISCV_BUILTIN (zero_di, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, zero64),
> +RISCV_BUILTIN (zero_si, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_SI, zero32),
> +RISCV_BUILTIN (zero_di, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_DI, zero64),
>
>  // zicbop
>  RISCV_BUILTIN (prefetchi_si, "zicbop_cbo_prefetchi", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI, prefetchi32),
> diff --git a/gcc/config/riscv/riscv-ftypes.def b/gcc/config/riscv/riscv-ftypes.def
> index 62421292ce7..77ac6ea3f66 100644
> --- a/gcc/config/riscv/riscv-ftypes.def
> +++ b/gcc/config/riscv/riscv-ftypes.def
> @@ -28,7 +28,7 @@ along with GCC; see the file COPYING3.  If not see
>
>  DEF_RISCV_FTYPE (0, (USI))
>  DEF_RISCV_FTYPE (1, (VOID, USI))
> -DEF_RISCV_FTYPE (0, (SI))
> -DEF_RISCV_FTYPE (0, (DI))
> +DEF_RISCV_FTYPE (1, (VOID, SI))
> +DEF_RISCV_FTYPE (1, (VOID, DI))
>  DEF_RISCV_FTYPE (1, (SI, SI))
>  DEF_RISCV_FTYPE (1, (DI, DI))
> diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c
> index e2ba2183511..2bf5b77380e 100644
> --- a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c
> +++ b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c
> @@ -1,21 +1,28 @@
>  /* { dg-do compile } */
>  /* { dg-options "-march=rv64gc_zicbom -mabi=lp64" } */
> +int var;
>
> -int foo1()
> +void foo1()
>  {
> -    return __builtin_riscv_zicbom_cbo_clean();
> +    __builtin_riscv_zicbom_cbo_clean(0);
> +    __builtin_riscv_zicbom_cbo_clean(var);

&var rather than var, we need an address here.

> +    __builtin_riscv_zicbom_cbo_clean(0x111);

Add cast here: (void*)0x111
Otherwise you will got some warning like this after apply above changes:

riscv-gcc/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c:9:38: warning:
passing argum
ent 1 of '__builtin_riscv_zicbom_cbo_clean' makes pointer from integer
without a cast [-Wint-conversion]
   9 |     __builtin_riscv_zicbom_cbo_clean(0x111);
     |                                      ^~~~~
     |                                      |
     |                                      int

>  }
>
> -int foo2()
> +void foo2()
>  {
> -    return __builtin_riscv_zicbom_cbo_flush();
> +    __builtin_riscv_zicbom_cbo_flush(0);
> +    __builtin_riscv_zicbom_cbo_flush(var);
> +    __builtin_riscv_zicbom_cbo_flush(0x111);
>  }
>
> -int foo3()
> +void foo3()
>  {
> -    return __builtin_riscv_zicbom_cbo_inval();
> +    __builtin_riscv_zicbom_cbo_inval(0);
> +    __builtin_riscv_zicbom_cbo_inval(var);
> +    __builtin_riscv_zicbom_cbo_inval(0x111);
>  }
>
> -/* { dg-final { scan-assembler-times "cbo.clean" 1 } } */
> -/* { dg-final { scan-assembler-times "cbo.flush" 1 } } */
> -/* { dg-final { scan-assembler-times "cbo.inval" 1 } } */
> +/* { dg-final { scan-assembler-times "cbo.clean" 3 } } */
> +/* { dg-final { scan-assembler-times "cbo.flush" 3 } } */
> +/* { dg-final { scan-assembler-times "cbo.inval" 3 } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c
> index a605e8b1bdc..572a6f05921 100644
> --- a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c
> +++ b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c
> @@ -1,21 +1,28 @@
>  /* { dg-do compile } */
>  /* { dg-options "-march=rv32gc_zicbom -mabi=ilp32" } */
> +int var;
>
> -int foo1()
> +void foo1()
>  {
> -    return __builtin_riscv_zicbom_cbo_clean();
> +    __builtin_riscv_zicbom_cbo_clean(0);
> +    __builtin_riscv_zicbom_cbo_clean(var);
> +    __builtin_riscv_zicbom_cbo_clean(0x111);
>  }
>
> -int foo2()
> +void foo2()
>  {
> -    return __builtin_riscv_zicbom_cbo_flush();
> +    __builtin_riscv_zicbom_cbo_flush(0);
> +    __builtin_riscv_zicbom_cbo_flush(var);
> +    __builtin_riscv_zicbom_cbo_flush(0x111);
>  }
>
> -int foo3()
> +void foo3()
>  {
> -    return __builtin_riscv_zicbom_cbo_inval();
> +    __builtin_riscv_zicbom_cbo_inval(0);
> +    __builtin_riscv_zicbom_cbo_inval(var);
> +    __builtin_riscv_zicbom_cbo_inval(0x111);
>  }
>
> -/* { dg-final { scan-assembler-times "cbo.clean" 1 } } */
> -/* { dg-final { scan-assembler-times "cbo.flush" 1 } } */
> -/* { dg-final { scan-assembler-times "cbo.inval" 1 } } */
> +/* { dg-final { scan-assembler-times "cbo.clean" 3 } } */
> +/* { dg-final { scan-assembler-times "cbo.flush" 3 } } */
> +/* { dg-final { scan-assembler-times "cbo.inval" 3 } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c
> index 96c1674ef2d..a239f24e9a8 100644
> --- a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c
> +++ b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c
> @@ -1,9 +1,12 @@
>  /* { dg-do compile } */
>  /* { dg-options "-march=rv64gc_zicboz -mabi=lp64" } */
> +int var;
>
> -int foo1()
> +void foo1()
>  {
> -    return __builtin_riscv_zicboz_cbo_zero();
> +    __builtin_riscv_zicboz_cbo_zero(0);
> +    __builtin_riscv_zicboz_cbo_zero(var);
> +    __builtin_riscv_zicboz_cbo_zero(0x121);
>  }
>
> -/* { dg-final { scan-assembler-times "cbo.zero" 1 } } */
> +/* { dg-final { scan-assembler-times "cbo.zero" 3 } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c
> index 9d99839b1e7..e31da1a5206 100644
> --- a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c
> +++ b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c
> @@ -1,9 +1,12 @@
>  /* { dg-do compile } */
>  /* { dg-options "-march=rv32gc_zicboz -mabi=ilp32" } */
> +int var;
>
> -int foo1()
> +void foo1()
>  {
> -    return __builtin_riscv_zicboz_cbo_zero();
> +    __builtin_riscv_zicboz_cbo_zero(0);
> +    __builtin_riscv_zicboz_cbo_zero(var);
> +    __builtin_riscv_zicboz_cbo_zero(0x121);
>  }
>
> -/* { dg-final { scan-assembler-times "cbo.zero" 1 } } */
> +/* { dg-final { scan-assembler-times "cbo.zero" 3 } } */
> --
> 2.17.1
>
  

Patch

diff with the previous version:
1.We deleted the RLT mode's second input operand.
2.We modified the type of builtins from RISCV_BUILTIN_DIRECT to RISCV_BUILTIN_DIRECT_NO_TARGET.
3.We modified the test cases and added more parameter tests.

Thanks, Simon and Kito.

gcc/ChangeLog:

        * config/riscv/riscv-cmo.def (RISCV_BUILTIN): changed BUILTIN_TYPE and FUNCTION_TYPE
        * config/riscv/riscv-ftypes.def (0): changed "DEF_RISCV_FTYPE (0, (SI/DI))" to "DEF_RISCV_FTYPE (1, (VOID, SI/DI))"
        (1):

gcc/testsuite/ChangeLog:

        * gcc.target/riscv/cmo-zicbom-1.c: added parameter and modified the fun's type
        * gcc.target/riscv/cmo-zicbom-2.c: added parameter and modified the fun's type
        * gcc.target/riscv/cmo-zicboz-1.c: added parameter and modified the fun's type
        * gcc.target/riscv/cmo-zicboz-2.c: added parameter and modified the fun's type

---
 gcc/config/riscv/riscv-cmo.def                | 16 ++++++------
 gcc/config/riscv/riscv-ftypes.def             |  4 +--
 gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c | 25 ++++++++++++-------
 gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c | 25 ++++++++++++-------
 gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c |  9 ++++---
 gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c |  9 ++++---
 6 files changed, 54 insertions(+), 34 deletions(-)

diff --git a/gcc/config/riscv/riscv-cmo.def b/gcc/config/riscv/riscv-cmo.def
index b30ecf96ec1..7b3da7c24ef 100644
--- a/gcc/config/riscv/riscv-cmo.def
+++ b/gcc/config/riscv/riscv-cmo.def
@@ -1,16 +1,16 @@ 
 // zicbom
-RISCV_BUILTIN (clean_si, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, clean32),
-RISCV_BUILTIN (clean_di, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, clean64),
+RISCV_BUILTIN (clean_si, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_SI, clean32),
+RISCV_BUILTIN (clean_di, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_DI, clean64),
 
-RISCV_BUILTIN (flush_si, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, flush32),
-RISCV_BUILTIN (flush_di, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, flush64),
+RISCV_BUILTIN (flush_si, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_SI, flush32),
+RISCV_BUILTIN (flush_di, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_DI, flush64),
 
-RISCV_BUILTIN (inval_si, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, inval32),
-RISCV_BUILTIN (inval_di, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, inval64),
+RISCV_BUILTIN (inval_si, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_SI, inval32),
+RISCV_BUILTIN (inval_di, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_DI, inval64),
 
 // zicboz
-RISCV_BUILTIN (zero_si, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, zero32),
-RISCV_BUILTIN (zero_di, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, zero64),
+RISCV_BUILTIN (zero_si, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_SI, zero32),
+RISCV_BUILTIN (zero_di, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_DI, zero64),
 
 // zicbop
 RISCV_BUILTIN (prefetchi_si, "zicbop_cbo_prefetchi", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI, prefetchi32),
diff --git a/gcc/config/riscv/riscv-ftypes.def b/gcc/config/riscv/riscv-ftypes.def
index 62421292ce7..77ac6ea3f66 100644
--- a/gcc/config/riscv/riscv-ftypes.def
+++ b/gcc/config/riscv/riscv-ftypes.def
@@ -28,7 +28,7 @@  along with GCC; see the file COPYING3.  If not see
 
 DEF_RISCV_FTYPE (0, (USI))
 DEF_RISCV_FTYPE (1, (VOID, USI))
-DEF_RISCV_FTYPE (0, (SI))
-DEF_RISCV_FTYPE (0, (DI))
+DEF_RISCV_FTYPE (1, (VOID, SI))
+DEF_RISCV_FTYPE (1, (VOID, DI))
 DEF_RISCV_FTYPE (1, (SI, SI))
 DEF_RISCV_FTYPE (1, (DI, DI))
diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c
index e2ba2183511..2bf5b77380e 100644
--- a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c
+++ b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c
@@ -1,21 +1,28 @@ 
 /* { dg-do compile } */
 /* { dg-options "-march=rv64gc_zicbom -mabi=lp64" } */
+int var;
 
-int foo1()
+void foo1()
 {
-    return __builtin_riscv_zicbom_cbo_clean();
+    __builtin_riscv_zicbom_cbo_clean(0);
+    __builtin_riscv_zicbom_cbo_clean(var);
+    __builtin_riscv_zicbom_cbo_clean(0x111);
 }
 
-int foo2()
+void foo2()
 {
-    return __builtin_riscv_zicbom_cbo_flush();
+    __builtin_riscv_zicbom_cbo_flush(0);
+    __builtin_riscv_zicbom_cbo_flush(var);
+    __builtin_riscv_zicbom_cbo_flush(0x111);
 }
 
-int foo3()
+void foo3()
 {
-    return __builtin_riscv_zicbom_cbo_inval();
+    __builtin_riscv_zicbom_cbo_inval(0);
+    __builtin_riscv_zicbom_cbo_inval(var);
+    __builtin_riscv_zicbom_cbo_inval(0x111);
 }
 
-/* { dg-final { scan-assembler-times "cbo.clean" 1 } } */
-/* { dg-final { scan-assembler-times "cbo.flush" 1 } } */
-/* { dg-final { scan-assembler-times "cbo.inval" 1 } } */
+/* { dg-final { scan-assembler-times "cbo.clean" 3 } } */
+/* { dg-final { scan-assembler-times "cbo.flush" 3 } } */
+/* { dg-final { scan-assembler-times "cbo.inval" 3 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c
index a605e8b1bdc..572a6f05921 100644
--- a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c
+++ b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c
@@ -1,21 +1,28 @@ 
 /* { dg-do compile } */
 /* { dg-options "-march=rv32gc_zicbom -mabi=ilp32" } */
+int var;
 
-int foo1()
+void foo1()
 {
-    return __builtin_riscv_zicbom_cbo_clean();
+    __builtin_riscv_zicbom_cbo_clean(0);
+    __builtin_riscv_zicbom_cbo_clean(var);
+    __builtin_riscv_zicbom_cbo_clean(0x111);
 }
 
-int foo2()
+void foo2()
 {
-    return __builtin_riscv_zicbom_cbo_flush();
+    __builtin_riscv_zicbom_cbo_flush(0);
+    __builtin_riscv_zicbom_cbo_flush(var);
+    __builtin_riscv_zicbom_cbo_flush(0x111);
 }
 
-int foo3()
+void foo3()
 {
-    return __builtin_riscv_zicbom_cbo_inval();
+    __builtin_riscv_zicbom_cbo_inval(0);
+    __builtin_riscv_zicbom_cbo_inval(var);
+    __builtin_riscv_zicbom_cbo_inval(0x111);
 }
 
-/* { dg-final { scan-assembler-times "cbo.clean" 1 } } */
-/* { dg-final { scan-assembler-times "cbo.flush" 1 } } */
-/* { dg-final { scan-assembler-times "cbo.inval" 1 } } */
+/* { dg-final { scan-assembler-times "cbo.clean" 3 } } */
+/* { dg-final { scan-assembler-times "cbo.flush" 3 } } */
+/* { dg-final { scan-assembler-times "cbo.inval" 3 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c
index 96c1674ef2d..a239f24e9a8 100644
--- a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c
+++ b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c
@@ -1,9 +1,12 @@ 
 /* { dg-do compile } */
 /* { dg-options "-march=rv64gc_zicboz -mabi=lp64" } */
+int var;
 
-int foo1()
+void foo1()
 {
-    return __builtin_riscv_zicboz_cbo_zero();
+    __builtin_riscv_zicboz_cbo_zero(0);
+    __builtin_riscv_zicboz_cbo_zero(var);
+    __builtin_riscv_zicboz_cbo_zero(0x121);
 }
 
-/* { dg-final { scan-assembler-times "cbo.zero" 1 } } */ 
+/* { dg-final { scan-assembler-times "cbo.zero" 3 } } */ 
diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c
index 9d99839b1e7..e31da1a5206 100644
--- a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c
+++ b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c
@@ -1,9 +1,12 @@ 
 /* { dg-do compile } */
 /* { dg-options "-march=rv32gc_zicboz -mabi=ilp32" } */
+int var;
 
-int foo1()
+void foo1()
 {
-    return __builtin_riscv_zicboz_cbo_zero();
+    __builtin_riscv_zicboz_cbo_zero(0);
+    __builtin_riscv_zicboz_cbo_zero(var);
+    __builtin_riscv_zicboz_cbo_zero(0x121);
 }
 
-/* { dg-final { scan-assembler-times "cbo.zero" 1 } } */
+/* { dg-final { scan-assembler-times "cbo.zero" 3 } } */