diff mbox series

[3/4] xtensa: Optimize '(~x & y)' to '((x & y) ^ y)'

Message ID 123a21c0-f79a-70a4-9ee6-abf874e3a695@yahoo.co.jp
State New
Headers
Series [1/4] xtensa: Implement bswaphi2 insn pattern |

Commit Message

Takayuki 'January June' Suwa May 29, 2022, 10:55 a.m. UTC 
  In Xtensa ISA, there is no single machine instruction that calculates unary
bitwise negation.

gcc/ChangeLog:

	* config/xtensa/xtensa.md (*andsi3_bitcmpl):
	New insn_and_split pattern.

gcc/testsuite/ChangeLog:

	* gcc.target/xtensa/check_zero_byte.c: New.
---
  gcc/config/xtensa/xtensa.md                   | 20 +++++++++++++++++++
  .../gcc.target/xtensa/check_zero_byte.c       |  9 +++++++++
  2 files changed, 29 insertions(+)
  create mode 100644 gcc/testsuite/gcc.target/xtensa/check_zero_byte.c

Comments

Max Filippov June 9, 2022, 10:12 p.m. UTC | #1 
On Sun, May 29, 2022 at 4:00 AM Takayuki 'January June' Suwa
<jjsuwa_sys3175@yahoo.co.jp> wrote:
>
> In Xtensa ISA, there is no single machine instruction that calculates unary
> bitwise negation.
>
> gcc/ChangeLog:
>
>         * config/xtensa/xtensa.md (*andsi3_bitcmpl):
>         New insn_and_split pattern.
>
> gcc/testsuite/ChangeLog:
>
>         * gcc.target/xtensa/check_zero_byte.c: New.
> ---
>   gcc/config/xtensa/xtensa.md                   | 20 +++++++++++++++++++
>   .../gcc.target/xtensa/check_zero_byte.c       |  9 +++++++++
>   2 files changed, 29 insertions(+)
>   create mode 100644 gcc/testsuite/gcc.target/xtensa/check_zero_byte.c

Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.
diff mbox series

Patch

diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index f11ae4910f8..4aa128eab64 100644
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -601,6 +601,26 @@ 
     (set_attr "mode"	"SI")
     (set_attr "length"	"3,3")])

+(define_insn_and_split "*andsi3_bitcmpl"
+  [(set (match_operand:SI 0 "register_operand" "=a")
+	(and:SI (not:SI (match_operand:SI 1 "register_operand" "r"))
+		(match_operand:SI 2 "register_operand" "r")))]
+  ""
+  "#"
+  "&& can_create_pseudo_p ()"
+  [(set (match_dup 3)
+	(and:SI (match_dup 1)
+		(match_dup 2)))
+   (set (match_dup 0)
+	(xor:SI (match_dup 3)
+		(match_dup 2)))]
+{
+  operands[3] = gen_reg_rtx (SImode);
+}
+  [(set_attr "type"	"arith")
+   (set_attr "mode"	"SI")
+   (set_attr "length"	"6")])
+
  (define_insn "iorsi3"
    [(set (match_operand:SI 0 "register_operand" "=a")
  	(ior:SI (match_operand:SI 1 "register_operand" "%r")
diff --git a/gcc/testsuite/gcc.target/xtensa/check_zero_byte.c 
b/gcc/testsuite/gcc.target/xtensa/check_zero_byte.c
new file mode 100644
index 00000000000..6a04aaeefa0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/xtensa/check_zero_byte.c
@@ -0,0 +1,9 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O" } */
+
+int check_zero_byte(int v)
+{
+  return (v - 0x01010101) & ~v & 0x80808080;
+}
+
+/* { dg-final { scan-assembler-not "movi" } } */