diff mbox series

rs6000: Fix unpack for no-direct-move (PR103623)

Message ID 0508f0b810985f4a8543ce44701ec7330ef29796.1649710990.git.segher@kernel.crashing.org
State Committed
Commit 0508f0b810985f4a8543ce44701ec7330ef29796
Headers
Series rs6000: Fix unpack for no-direct-move (PR103623) |

Commit Message

Segher Boessenkool April 11, 2022, 9:03 p.m. UTC 
  The _dm alternative works fine for soft-float, but the _nodm variant
pattern is missing that alternative.  So, let's add that.

There probably should be an r,r,i alternative as well (or we can make it
rm,r,i), but that is for later.

Tested on powerpc64-linux {-m32,-m64}.  Pushed to trunk.


Segher


2022-04-11  Segher Boessenkool  <segher@kernel.crashing.org>

	PR target/105213
	PR target/103623
	* config/rs6000/rs6000.md (unpack<mode>_nodm): Add m,r,i alternative.
---
 gcc/config/rs6000/rs6000.md | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index fdfbc6566a5c..f05b8358ba0a 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -14580,10 +14580,10 @@  (define_insn_and_split "unpack<mode>_dm"
   [(set_attr "type" "fp,fpstore,mtvsr,mfvsr,store")])
 
 (define_insn_and_split "unpack<mode>_nodm"
-  [(set (match_operand:<FP128_64> 0 "nonimmediate_operand" "=d,m")
+  [(set (match_operand:<FP128_64> 0 "nonimmediate_operand" "=d,m,m")
 	(unspec:<FP128_64>
-	 [(match_operand:FMOVE128 1 "register_operand" "d,d")
-	  (match_operand:QI 2 "const_0_to_1_operand" "i,i")]
+	 [(match_operand:FMOVE128 1 "register_operand" "d,d,r")
+	  (match_operand:QI 2 "const_0_to_1_operand" "i,i,i")]
 	 UNSPEC_UNPACK_128BIT))]
   "(!TARGET_POWERPC64 || !TARGET_DIRECT_MOVE) && FLOAT128_2REG_P (<MODE>mode)"
   "#"
@@ -14600,7 +14600,7 @@  (define_insn_and_split "unpack<mode>_nodm"
 
   operands[3] = gen_rtx_REG (<FP128_64>mode, fp_regno);
 }
-  [(set_attr "type" "fp,fpstore")])
+  [(set_attr "type" "fp,fpstore,store")])
 
 (define_insn_and_split "pack<mode>"
   [(set (match_operand:FMOVE128 0 "register_operand" "=&d")