[0/2] : Fix address cost complexity and register pressure cost calculation.

Message ID 20221221131214.190579-1-dimitrije.milosevic@syrmia.com
Headers
Series : Fix address cost complexity and register pressure cost calculation. |

Message

Dimitrije Milošević Dec. 21, 2022, 1:12 p.m. UTC
  Architectures like Mips are very limited when it comes to addressing modes. Therefore, the expected
behavior would be that, for the BASE + OFFSET addressing mode, complexity is lower, while, for more
complex addressing modes (e.g. BASE + INDEX << SCALE), which are not supported, complexity is
higher. Currently, the complexity calculation algorithm bails out if BASE + INDEX addressing mode
is not supported by the target architecture, resuling in 0-complexities for all candidates, which
leads to non-optimal candidate selection, especially in scenarios where there are multiple nested
loops.

Register pressure cost model isn't optimal for the case when there are enough registers. Currently,
the register pressure cost is bumped up by another n_cands, while there is no reason for the
register pressure cost to be equal to n_cands + n_invs (for that case).
Adding another n_cands could be used as a tie-breaker for the two cases where we do have enough
registers and the sum of n_invs and n_cands is equal, however I think there are two problems with
that:
  - How often does it happen that we have two cases where we do have enough registers,
  n_invs + n_cands sums are equal, and n_cands differ? I think that's pretty rare.
  - Bumping up the cost by another n_cands may lead to cost for the "If we do have
  enough registers." case to be higher than for other cases, which doesn't make sense.

Dimitrije Milosevic (2):
  ivopts: ivopts: Compute complexity for unsupported addressing modes.
  ivopts: Revert register pressure cost when there are enough registers.

 gcc/tree-ssa-loop-ivopts.cc | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)
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2.25.1