Message ID | 20220707085231.68930-1-kito.cheng@sifive.com |
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Return-Path: <gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org> X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id E76CE385E005 for <patchwork@sourceware.org>; Thu, 7 Jul 2022 08:52:53 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-pf1-x434.google.com (mail-pf1-x434.google.com [IPv6:2607:f8b0:4864:20::434]) by sourceware.org (Postfix) with ESMTPS id F17933858D32 for <gcc-patches@gcc.gnu.org>; Thu, 7 Jul 2022 08:52:36 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org F17933858D32 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=sifive.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=sifive.com Received: by mail-pf1-x434.google.com with SMTP id y141so18052539pfb.7 for <gcc-patches@gcc.gnu.org>; Thu, 07 Jul 2022 01:52:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:subject:date:message-id:mime-version :content-transfer-encoding; bh=u03Bx82FPTqZebNSOnbjyb7ygwRgaGUX5emql7lPFEk=; b=LjqkM8BeN4i8x8K7C5IbnKN3ZSfgQ3xgvqRXMKVFJzz7embVPZy3Vw3xCpnv5z6Ckn xRZoWVh+sGXV7YaSmu/BCxy8MZDtjAUXef2FhEBFHggkCdppoKOf88lKJ179R9r+1XxF fpYUCbPiDTRMfpHVWXkdTJNFZyvKTOudwXkJya0ziw6UYYamQVzp9Y5utonZB3OaS4ig R1PfYKurnv8w+VCKOaYQHCq1TXB7VXHlYwvkNDpd+Nbh1iRkK1mfMHhfJP+vsmr5aNgR eOdA0GtB1CUpm5zCTBiO6EY2tUfzcq4aKlKndIbCVhNq/KqywvYPbwshc9ElRjiSEyo4 HHuw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:mime-version :content-transfer-encoding; bh=u03Bx82FPTqZebNSOnbjyb7ygwRgaGUX5emql7lPFEk=; b=VlcqbOniFYyzik9lhzPrPVlrnipinmvRW+7uErKE09/9181aAEywmR6SMJhhn+qTMh bV5Do16B2dQVSRhqCOtUgWTrU2t5MiE1afTq3UjaI/61NSf0NnIz2Xcjr6OFEamTRfFx uKQ/ck5gef7rW81A65qW8vfupuHHOcQYhRdlpiXcrae2Zlk2sWrByZN8iFh/aoyKTCoe zblASWVfZon/OlDo6MWxaKPwDPegqeEV6F/o8m2NLb7B11PO0SH15iBIgolJFTh4vkZc DE4c0b3mao0cYtfJcglQNyqU1B8TDmzsnCPWFNuERJODgJXxI7GhbdGdFGOumCpe6ggb DRLw== X-Gm-Message-State: AJIora/Vzb9/YZlSp903Nm6ZnQXVUCttFFRq+jJP90DxUE9R1LwH7TZ0 lWBqNGbKC8HbkJUVUH9wH/uqp44SY56xCw== X-Google-Smtp-Source: AGRyM1sx0Dmmt1jOK/E3hehLPoOCWcVk5unrdvW6Wofgg1+iaaDP1kjdqQJuqrVa2Jy4627f4cBAeQ== X-Received: by 2002:a17:90b:1e04:b0:1ef:bb89:4916 with SMTP id pg4-20020a17090b1e0400b001efbb894916mr4005218pjb.63.1657183955689; Thu, 07 Jul 2022 01:52:35 -0700 (PDT) Received: from hsinchu02.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id l6-20020a170903120600b0016a0bf0ce32sm18224665plh.70.2022.07.07.01.52.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Jul 2022 01:52:35 -0700 (PDT) From: Kito Cheng <kito.cheng@sifive.com> To: gcc-patches@gcc.gnu.org, kito.cheng@gmail.com, jim.wilson.gcc@gmail.com, palmer@dabbelt.com, andrew@sifive.com, juzhe.zhong@rivai.ai Subject: [PATCH 0/0] RISC-V: Support IEEE half precision operation Date: Thu, 7 Jul 2022 16:52:29 +0800 Message-Id: <20220707085231.68930-1-kito.cheng@sifive.com> X-Mailer: git-send-email 2.34.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-7.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list <gcc-patches.gcc.gnu.org> List-Unsubscribe: <https://gcc.gnu.org/mailman/options/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe> List-Archive: <https://gcc.gnu.org/pipermail/gcc-patches/> List-Post: <mailto:gcc-patches@gcc.gnu.org> List-Help: <mailto:gcc-patches-request@gcc.gnu.org?subject=help> List-Subscribe: <https://gcc.gnu.org/mailman/listinfo/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe> Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" <gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org> |
Series |
RISC-V: Support IEEE half precision operation
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Message
Kito Cheng
July 7, 2022, 8:52 a.m. UTC
This patch set implement _Float16 both for softfloat and hardfloat (zfh/zfhmin), _Float16 has introduced into RISC-V psABI[1] since Jul 2021 and zfh/zfhmin extension has ratified since 2022[2]. [1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/172 [2] https://github.com/riscv/riscv-isa-manual/commit/b35a54079e0da11740ce5b1e6db999d1d5172768