Message ID | 20220223094418.3518-1-shihua@iscas.ac.cn |
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Return-Path: <gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org> X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A324839484BD for <patchwork@sourceware.org>; Wed, 23 Feb 2022 09:45:24 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from cstnet.cn (smtp25.cstnet.cn [159.226.251.25]) by sourceware.org (Postfix) with ESMTP id 1E9D63947C24 for <gcc-patches@gcc.gnu.org>; Wed, 23 Feb 2022 09:44:36 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 1E9D63947C24 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=iscas.ac.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=iscas.ac.cn Received: from localhost.localdomain (unknown [58.212.93.238]) by APP-05 (Coremail) with SMTP id zQCowADXD0L8ARZiCQpOAQ--.41254S2; Wed, 23 Feb 2022 17:44:30 +0800 (CST) From: shihua@iscas.ac.cn To: gcc-patches@gcc.gnu.org Subject: [PATCH 0/5 V1] RISC-V:Implement Crypto extension's instruction patterns and it's intrinsics Date: Wed, 23 Feb 2022 17:44:13 +0800 Message-Id: <20220223094418.3518-1-shihua@iscas.ac.cn> X-Mailer: git-send-email 2.31.1.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID: zQCowADXD0L8ARZiCQpOAQ--.41254S2 X-Coremail-Antispam: 1UD129KBjvJXoWxXr1ktw47Kr13CFyxWFyxuFg_yoW5Kry3pa 15GrWYkry5JF9rGr1ftFy7ta15CwsYgrW5uwn7Xw1Iy3yftrW8tF1kKr1xAF43JF48Xrn3 uw4I93W5uw12qrDanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUU9014x267AKxVW8JVW5JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26w1j6s0DM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4U JVWxJr1l84ACjcxK6I8E87Iv67AKxVWxJr0_GcWl84ACjcxK6I8E87Iv6xkF7I0E14v26r xl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj 6xIIjxv20xvE14v26r1j6r18McIj6I8E87Iv67AKxVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr 0_Gr1lF7xvr2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7M4IIrI8v6xkF7I0E 8cxan2IY04v7M4kE6xkIj40Ew7xC0wCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbV WUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF 67kF1VAFwI0_Jw0_GFylIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42 IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1lIxAIcVCF04k26cxKx2IYs7xG6rWUJVWrZr1U MIIF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIda VFxhVjvjDU0xZFpf9x0JUSiihUUUUU= X-Originating-IP: [58.212.93.238] X-CM-SenderInfo: xvklx33d6l2u1dvotugofq/1tbiCQcGEV02a8t+YgAAsO X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_MSPIKE_H5, RCVD_IN_MSPIKE_WL, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list <gcc-patches.gcc.gnu.org> List-Unsubscribe: <https://gcc.gnu.org/mailman/options/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe> List-Archive: <https://gcc.gnu.org/pipermail/gcc-patches/> List-Post: <mailto:gcc-patches@gcc.gnu.org> List-Help: <mailto:gcc-patches-request@gcc.gnu.org?subject=help> List-Subscribe: <https://gcc.gnu.org/mailman/listinfo/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe> Cc: ben.marshall@pqshield.com, cmuellner@ventanamicro.com, andrew@sifive.com, jiawei@iscas.ac.cn, mjos@iki.fi, kito.cheng@sifive.com, LiaoShihua <shihua@iscas.ac.cn> Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" <gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org> |
Series |
RISC-V:Implement Crypto extension's instruction patterns and it's intrinsics
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Message
Liao Shihua
Feb. 23, 2022, 9:44 a.m. UTC
From: LiaoShihua <shihua@iscas.ac.cn>
This patch set is the implementation of Crypto extension, which includes zbkb, zbkc, zbkx,
zknd, zknh, zkne,zksed and zksh extension.
It includes instruction/md patterns, intrinsic functions, testcases for intrinsic functions,
and test macros.
The definitions of intrinsic functions come from https://github.com/rvkrypto/rvkrypto-fips .
This work is done by Liao Shihua and Wu Siyu.
LiaoShihua (5):
RISC-V:Implement instruction patterns for Crypto extensions
RISC-V:Implement built-in instructions for Crypto extensions
RISC-V:Implement intrinsics for Crypto extensions
RISC-V:Implement testcases for Crypto extensions
RISC-V:Implement architecture extension test macros for Crypto extensions
gcc/config.gcc | 1 +
gcc/config/riscv/crypto.md | 383 +++++++++++++
gcc/config/riscv/predicates.md | 8 +
gcc/config/riscv/riscv-builtins-crypto.def | 93 ++++
gcc/config/riscv/riscv-builtins.cc | 35 ++
gcc/config/riscv/riscv-c.cc | 9 +
gcc/config/riscv/riscv-ftypes.def | 7 +
gcc/config/riscv/riscv.md | 1 +
gcc/config/riscv/riscv_crypto.h | 12 +
gcc/config/riscv/riscv_crypto_scalar.h | 247 +++++++++
gcc/config/riscv/rvk_asm_intrin.h | 187 +++++++
gcc/config/riscv/rvk_emu_intrin.h | 594 +++++++++++++++++++++
gcc/testsuite/gcc.target/riscv/predef-17.c | 59 ++
gcc/testsuite/gcc.target/riscv/zbkb32.c | 34 ++
gcc/testsuite/gcc.target/riscv/zbkb64.c | 21 +
gcc/testsuite/gcc.target/riscv/zbkc32.c | 16 +
gcc/testsuite/gcc.target/riscv/zbkc64.c | 16 +
gcc/testsuite/gcc.target/riscv/zbkx32.c | 16 +
gcc/testsuite/gcc.target/riscv/zbkx64.c | 16 +
gcc/testsuite/gcc.target/riscv/zknd32.c | 18 +
gcc/testsuite/gcc.target/riscv/zknd64.c | 35 ++
gcc/testsuite/gcc.target/riscv/zkne64.c | 29 +
gcc/testsuite/gcc.target/riscv/zknh.c | 28 +
gcc/testsuite/gcc.target/riscv/zknh32.c | 40 ++
gcc/testsuite/gcc.target/riscv/zknh64.c | 29 +
gcc/testsuite/gcc.target/riscv/zksed.c | 20 +
gcc/testsuite/gcc.target/riscv/zksh.c | 17 +
27 files changed, 1971 insertions(+)
create mode 100644 gcc/config/riscv/crypto.md
create mode 100644 gcc/config/riscv/riscv-builtins-crypto.def
create mode 100644 gcc/config/riscv/riscv_crypto.h
create mode 100644 gcc/config/riscv/riscv_crypto_scalar.h
create mode 100644 gcc/config/riscv/rvk_asm_intrin.h
create mode 100644 gcc/config/riscv/rvk_emu_intrin.h
create mode 100644 gcc/testsuite/gcc.target/riscv/predef-17.c
create mode 100644 gcc/testsuite/gcc.target/riscv/zbkb32.c
create mode 100644 gcc/testsuite/gcc.target/riscv/zbkb64.c
create mode 100644 gcc/testsuite/gcc.target/riscv/zbkc32.c
create mode 100644 gcc/testsuite/gcc.target/riscv/zbkc64.c
create mode 100644 gcc/testsuite/gcc.target/riscv/zbkx32.c
create mode 100644 gcc/testsuite/gcc.target/riscv/zbkx64.c
create mode 100644 gcc/testsuite/gcc.target/riscv/zknd32.c
create mode 100644 gcc/testsuite/gcc.target/riscv/zknd64.c
create mode 100644 gcc/testsuite/gcc.target/riscv/zkne64.c
create mode 100644 gcc/testsuite/gcc.target/riscv/zknh.c
create mode 100644 gcc/testsuite/gcc.target/riscv/zknh32.c
create mode 100644 gcc/testsuite/gcc.target/riscv/zknh64.c
create mode 100644 gcc/testsuite/gcc.target/riscv/zksed.c
create mode 100644 gcc/testsuite/gcc.target/riscv/zksh.c