diff mbox series

[01/11] x86: record flag_code in tc_frag_data

Message ID fd926ca7-c7cb-5e37-51dc-43adbf6522c3@suse.com
State New
Headers
Series x86: NOP emission adjustments |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_binutils_check--master-arm success Testing passed
linaro-tcwg-bot/tcwg_binutils_check--master-aarch64 success Testing passed
linaro-tcwg-bot/tcwg_binutils_build--master-arm success Testing passed
linaro-tcwg-bot/tcwg_binutils_build--master-aarch64 success Testing passed

Commit Message

Jan Beulich Sept. 27, 2023, 3:47 p.m. UTC 
  The recorded value, and not the global variable, will want using in
TC_FRAG_INIT(). The so far file scope variable therefore needs to become
external, to be accessible there.
diff mbox series

Patch

--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -165,7 +165,7 @@  static const char *parse_insn (const cha
 static char *parse_operands (char *, const char *);
 static void swap_operands (void);
 static void swap_2_operands (unsigned int, unsigned int);
-static enum flag_code i386_addressing_mode (void);
+static enum i386_flag_code i386_addressing_mode (void);
 static void optimize_imm (void);
 static bool optimize_disp (const insn_template *t);
 static const insn_template *match_template (char);
@@ -579,15 +579,8 @@  static int this_operand = -1;
 /* Are we processing a .insn directive?  */
 #define dot_insn() (i.tm.mnem_off == MN__insn)
 
-/* We support four different modes.  FLAG_CODE variable is used to distinguish
-   these.  */
-
-enum flag_code {
-	CODE_32BIT,
-	CODE_16BIT,
-	CODE_64BIT };
-
-static enum flag_code flag_code;
+enum i386_flag_code i386_flag_code;
+#define flag_code i386_flag_code /* Permit to continue using original name.  */
 static unsigned int object_64bit;
 static unsigned int disallow_64bit_reloc;
 static int use_rela_relocations = 0;
@@ -9162,8 +9155,6 @@  output_branch (void)
       off = 0;
     }
 
-  frag_now->tc_frag_data.code64 = flag_code == CODE_64BIT;
-
   /* 1 possible extra opcode + 4 byte displacement go in var part.
      Pass reloc in fr_var.  */
   frag_var (rs_machine_dependent, 5, i.reloc[0], subtype, sym, off, p);
@@ -13524,7 +13515,8 @@  md_estimate_size_before_relax (fragS *fr
       else if (size == 2)
 	reloc_type = BFD_RELOC_16_PCREL;
 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
-      else if (fragP->tc_frag_data.code64 && fragP->fr_offset == 0
+      else if (fragP->tc_frag_data.code == CODE_64BIT
+	       && fragP->fr_offset == 0
 	       && need_plt32_p (fragP->fr_symbol))
 	reloc_type = BFD_RELOC_X86_64_PLT32;
 #endif
--- a/gas/config/tc-i386.h
+++ b/gas/config/tc-i386.h
@@ -264,6 +264,15 @@  extern enum processor_type cpu_arch_tune
 extern enum processor_type cpu_arch_isa;
 extern i386_cpu_flags cpu_arch_isa_flags;
 
+/* We support four different modes.  I386_FLAG_CODE variable is used to
+   distinguish three of these.  */
+
+extern enum i386_flag_code {
+	CODE_32BIT,
+	CODE_16BIT,
+	CODE_64BIT
+} i386_flag_code;
+
 struct i386_tc_frag_data
 {
   union
@@ -275,6 +284,7 @@  struct i386_tc_frag_data
   enum processor_type isa;
   i386_cpu_flags isa_flags;
   enum processor_type tune;
+  enum i386_flag_code code;
   unsigned int max_bytes;
   unsigned char length;
   unsigned char last_length;
@@ -285,7 +295,6 @@  struct i386_tc_frag_data
   unsigned int mf_type : 3;
   unsigned int classified : 1;
   unsigned int branch_type : 3;
-  unsigned int code64 : 1; /* Only set by output_branch for now.  */
 };
 
 /* We need to emit the right NOP pattern in .align frags.  This is
@@ -301,6 +310,7 @@  struct i386_tc_frag_data
      (FRAGP)->tc_frag_data.isa = cpu_arch_isa;			\
      (FRAGP)->tc_frag_data.isa_flags = cpu_arch_isa_flags;	\
      (FRAGP)->tc_frag_data.tune = cpu_arch_tune;		\
+     (FRAGP)->tc_frag_data.code = i386_flag_code;		\
      (FRAGP)->tc_frag_data.max_bytes = (MAX_BYTES);		\
      (FRAGP)->tc_frag_data.length = 0;				\
      (FRAGP)->tc_frag_data.last_length = 0;			\