diff mbox series

[2/4] x86: make code size vs CPU arch checking consistent

Message ID 806a32b4-d0b8-fcba-bfdf-4e7f4d587172@suse.com
State New
Headers
Series x86: Cpu64 / CpuNo64 adjustments |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_binutils_check--master-aarch64 success Testing passed
linaro-tcwg-bot/tcwg_binutils_check--master-arm success Testing passed
linaro-tcwg-bot/tcwg_binutils_build--master-arm success Testing passed
linaro-tcwg-bot/tcwg_binutils_build--master-aarch64 success Testing passed

Commit Message

Jan Beulich Sept. 8, 2023, 12:54 p.m. UTC 
  While update_code_flag() checks for LM / i386, set_cpu_arch() so far
didn't, allowing e.g. 64-bit code to be emitted after ".arch generic32".

Oddly enough a few of our testcases actually exhibit bad behavior (and
hence need minor adjustments).
diff mbox series

Patch

--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -2928,6 +2928,24 @@  set_cpu_arch (int dummy ATTRIBUTE_UNUSED
 	    {
 	      check_cpu_arch_compatible (string, cpu_arch[j].enable);
 
+	      if (flag_code == CODE_64BIT && !cpu_arch[j].enable.bitfield.cpulm )
+		{
+		  as_bad (_("64bit mode not supported on `%s'."),
+			  cpu_arch[j].name);
+		  (void) restore_line_pointer (e);
+		  ignore_rest_of_line ();
+		  return;
+		}
+
+	      if (flag_code == CODE_32BIT && !cpu_arch[j].enable.bitfield.cpui386)
+		{
+		  as_bad (_("32bit mode not supported on `%s'."),
+			  cpu_arch[j].name);
+		  (void) restore_line_pointer (e);
+		  ignore_rest_of_line ();
+		  return;
+		}
+
 	      cpu_arch_name = cpu_arch[j].name;
 	      free (cpu_sub_arch_name);
 	      cpu_sub_arch_name = NULL;
--- a/gas/testsuite/gas/i386/287.s
+++ b/gas/testsuite/gas/i386/287.s
@@ -1,9 +1,9 @@ 
 # Check 287-only instructions.
 
 	.text
+	.code16
 	.arch i286
 	.arch .287
-	.code16
 _8087:
 	fnsetpm
 	frstpm
--- a/gas/testsuite/gas/i386/8087.s
+++ b/gas/testsuite/gas/i386/8087.s
@@ -1,9 +1,9 @@ 
 # Check 8087-only instructions.
 
 	.text
+	.code16
 	.arch i8086
 	.arch .8087
-	.code16
 _8087:
 	fdisi
 	feni
--- a/gas/testsuite/gas/i386/att-regs.s
+++ b/gas/testsuite/gas/i386/att-regs.s
@@ -1,8 +1,8 @@ 
 	.text
 	.att_syntax noprefix
 
-	.arch i286
 	.code16
+	.arch i286
 	mov	eax, ax			; add	al, (bx,si)
 	mov	rax, ax			; add	al, (bx,si)
 	mov	axl, ax			; add	al, (bx,si)
--- a/gas/testsuite/gas/i386/intel-regs.s
+++ b/gas/testsuite/gas/i386/intel-regs.s
@@ -3,8 +3,8 @@ 
 
 	mov	eax, tmm1
 
-	.arch i286
 	.code16
+	.arch i286
 	mov	ax, eax			; add	[bx+si], al
 	mov	ax, rax			; add	[bx+si], al
 	mov	ax, axl			; add	[bx+si], al
--- a/gas/testsuite/gas/i386/inval-16.l
+++ b/gas/testsuite/gas/i386/inval-16.l
@@ -10,7 +10,7 @@  GAS LISTING .*
 
 
 [ 	]*1[ 	]+\.text
-[ 	]*2[ 	]+\.arch i186; \.code16
+[ 	]*2[ 	]+\.code16; \.arch i186
 [ 	]*3[ 	]+vmovapd	%xmm0,%xmm1
 [ 	]*4[ 	]+vaddsd	%xmm4, %xmm5, %xmm6\{%k7\}
 [ 	]*5[ 	]+vfrczpd	%xmm7,%xmm7
--- a/gas/testsuite/gas/i386/inval-16.s
+++ b/gas/testsuite/gas/i386/inval-16.s
@@ -1,5 +1,5 @@ 
 	.text
-	.arch i186; .code16
+	.code16; .arch i186
 	vmovapd	%xmm0,%xmm1
 	vaddsd	%xmm4, %xmm5, %xmm6{%k7}
 	vfrczpd	%xmm7,%xmm7
--- a/gas/testsuite/gas/i386/nops-5.s
+++ b/gas/testsuite/gas/i386/nops-5.s
@@ -1,4 +1,5 @@ 
 	.text
+	.code32
 	.arch i386
 i386:
 	movsbl %al,%esi