diff mbox series

RISC-V: Remove semicolons from DECLARE_INSN

Message ID 6f85247eec616650608b48c4393f7b93006037d0.1697677648.git.research_trasio@irq.a4lg.com
State New
Headers
Series RISC-V: Remove semicolons from DECLARE_INSN |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_binutils_check--master-aarch64 success Testing passed
linaro-tcwg-bot/tcwg_binutils_check--master-arm warning Patch is already merged
linaro-tcwg-bot/tcwg_binutils_build--master-arm warning Patch is already merged
linaro-tcwg-bot/tcwg_binutils_build--master-aarch64 warning Patch is already merged

Commit Message

Tsukasa OI Oct. 19, 2023, 1:07 a.m. UTC 
  From: Tsukasa OI <research_trasio@irq.a4lg.com>

This is for consistency and to prevent possible unnecessary errors due
to this inconsistency.

include/ChangeLog:

	* opcode/riscv-opc.h (DECLARE_INSN): Remove semicolons from the
	end of each entry.
---
 include/opcode/riscv-opc.h | 30 +++++++++++++++---------------
 1 file changed, 15 insertions(+), 15 deletions(-)


base-commit: e734b3e980d8a30ea23b5640d871b59d33720ecf

Comments

Nelson Chu Oct. 19, 2023, 2:06 a.m. UTC | #1 
Okay, thanks.

Nelson

On Thu, Oct 19, 2023 at 9:08 AM Tsukasa OI <research_trasio@irq.a4lg.com>
wrote:

> From: Tsukasa OI <research_trasio@irq.a4lg.com>
>
> This is for consistency and to prevent possible unnecessary errors due
> to this inconsistency.
>
> include/ChangeLog:
>
>         * opcode/riscv-opc.h (DECLARE_INSN): Remove semicolons from the
>         end of each entry.
> ---
>  include/opcode/riscv-opc.h | 30 +++++++++++++++---------------
>  1 file changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
> index 1f1aa1d1efcf..375483500e2a 100644
> --- a/include/opcode/riscv-opc.h
> +++ b/include/opcode/riscv-opc.h
> @@ -3350,26 +3350,26 @@ DECLARE_INSN(hsv_h, MATCH_HSV_H, MASK_HSV_H)
>  DECLARE_INSN(hsv_w, MATCH_HSV_W, MASK_HSV_W)
>  DECLARE_INSN(hsv_d, MATCH_HSV_D, MASK_HSV_D)
>  /* Zicbop instructions.  */
> -DECLARE_INSN(prefetch_r, MATCH_PREFETCH_R, MASK_PREFETCH_R);
> -DECLARE_INSN(prefetch_w, MATCH_PREFETCH_W, MASK_PREFETCH_W);
> -DECLARE_INSN(prefetch_i, MATCH_PREFETCH_I, MASK_PREFETCH_I);
> +DECLARE_INSN(prefetch_r, MATCH_PREFETCH_R, MASK_PREFETCH_R)
> +DECLARE_INSN(prefetch_w, MATCH_PREFETCH_W, MASK_PREFETCH_W)
> +DECLARE_INSN(prefetch_i, MATCH_PREFETCH_I, MASK_PREFETCH_I)
>  /* Zicbom/Zicboz instructions. */
> -DECLARE_INSN(cbo_clean, MATCH_CBO_CLEAN, MASK_CBO_CLEAN);
> -DECLARE_INSN(cbo_flush, MATCH_CBO_FLUSH, MASK_CBO_FLUSH);
> -DECLARE_INSN(cbo_inval, MATCH_CBO_INVAL, MASK_CBO_INVAL);
> -DECLARE_INSN(cbo_zero, MATCH_CBO_ZERO, MASK_CBO_ZERO);
> +DECLARE_INSN(cbo_clean, MATCH_CBO_CLEAN, MASK_CBO_CLEAN)
> +DECLARE_INSN(cbo_flush, MATCH_CBO_FLUSH, MASK_CBO_FLUSH)
> +DECLARE_INSN(cbo_inval, MATCH_CBO_INVAL, MASK_CBO_INVAL)
> +DECLARE_INSN(cbo_zero, MATCH_CBO_ZERO, MASK_CBO_ZERO)
>  /* Zicond instructions. */
>  DECLARE_INSN(czero_eqz, MATCH_CZERO_EQZ, MASK_CZERO_EQZ)
>  DECLARE_INSN(czero_nez, MATCH_CZERO_NEZ, MASK_CZERO_NEZ)
>  /* Zihintntl hint instructions.  */
> -DECLARE_INSN(ntl_p1, MATCH_NTL_P1, MASK_NTL_P1);
> -DECLARE_INSN(ntl_pall, MATCH_NTL_PALL, MASK_NTL_PALL);
> -DECLARE_INSN(ntl_s1, MATCH_NTL_S1, MASK_NTL_S1);
> -DECLARE_INSN(ntl_all, MATCH_NTL_ALL, MASK_NTL_ALL);
> -DECLARE_INSN(c_ntl_p1, MATCH_C_NTL_P1, MASK_C_NTL_P1);
> -DECLARE_INSN(c_ntl_pall, MATCH_C_NTL_PALL, MASK_C_NTL_PALL);
> -DECLARE_INSN(c_ntl_s1, MATCH_C_NTL_S1, MASK_C_NTL_S1);
> -DECLARE_INSN(c_ntl_all, MATCH_C_NTL_ALL, MASK_C_NTL_ALL);
> +DECLARE_INSN(ntl_p1, MATCH_NTL_P1, MASK_NTL_P1)
> +DECLARE_INSN(ntl_pall, MATCH_NTL_PALL, MASK_NTL_PALL)
> +DECLARE_INSN(ntl_s1, MATCH_NTL_S1, MASK_NTL_S1)
> +DECLARE_INSN(ntl_all, MATCH_NTL_ALL, MASK_NTL_ALL)
> +DECLARE_INSN(c_ntl_p1, MATCH_C_NTL_P1, MASK_C_NTL_P1)
> +DECLARE_INSN(c_ntl_pall, MATCH_C_NTL_PALL, MASK_C_NTL_PALL)
> +DECLARE_INSN(c_ntl_s1, MATCH_C_NTL_S1, MASK_C_NTL_S1)
> +DECLARE_INSN(c_ntl_all, MATCH_C_NTL_ALL, MASK_C_NTL_ALL)
>  /* Zawrs instructions.  */
>  DECLARE_INSN(wrs_nto, MATCH_WRS_NTO, MASK_WRS_NTO)
>  DECLARE_INSN(wrs_sto, MATCH_WRS_STO, MASK_WRS_STO)
>
> base-commit: e734b3e980d8a30ea23b5640d871b59d33720ecf
> --
> 2.42.0
>
>
diff mbox series

Patch

diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
index 1f1aa1d1efcf..375483500e2a 100644
--- a/include/opcode/riscv-opc.h
+++ b/include/opcode/riscv-opc.h
@@ -3350,26 +3350,26 @@  DECLARE_INSN(hsv_h, MATCH_HSV_H, MASK_HSV_H)
 DECLARE_INSN(hsv_w, MATCH_HSV_W, MASK_HSV_W)
 DECLARE_INSN(hsv_d, MATCH_HSV_D, MASK_HSV_D)
 /* Zicbop instructions.  */
-DECLARE_INSN(prefetch_r, MATCH_PREFETCH_R, MASK_PREFETCH_R);
-DECLARE_INSN(prefetch_w, MATCH_PREFETCH_W, MASK_PREFETCH_W);
-DECLARE_INSN(prefetch_i, MATCH_PREFETCH_I, MASK_PREFETCH_I);
+DECLARE_INSN(prefetch_r, MATCH_PREFETCH_R, MASK_PREFETCH_R)
+DECLARE_INSN(prefetch_w, MATCH_PREFETCH_W, MASK_PREFETCH_W)
+DECLARE_INSN(prefetch_i, MATCH_PREFETCH_I, MASK_PREFETCH_I)
 /* Zicbom/Zicboz instructions. */
-DECLARE_INSN(cbo_clean, MATCH_CBO_CLEAN, MASK_CBO_CLEAN);
-DECLARE_INSN(cbo_flush, MATCH_CBO_FLUSH, MASK_CBO_FLUSH);
-DECLARE_INSN(cbo_inval, MATCH_CBO_INVAL, MASK_CBO_INVAL);
-DECLARE_INSN(cbo_zero, MATCH_CBO_ZERO, MASK_CBO_ZERO);
+DECLARE_INSN(cbo_clean, MATCH_CBO_CLEAN, MASK_CBO_CLEAN)
+DECLARE_INSN(cbo_flush, MATCH_CBO_FLUSH, MASK_CBO_FLUSH)
+DECLARE_INSN(cbo_inval, MATCH_CBO_INVAL, MASK_CBO_INVAL)
+DECLARE_INSN(cbo_zero, MATCH_CBO_ZERO, MASK_CBO_ZERO)
 /* Zicond instructions. */
 DECLARE_INSN(czero_eqz, MATCH_CZERO_EQZ, MASK_CZERO_EQZ)
 DECLARE_INSN(czero_nez, MATCH_CZERO_NEZ, MASK_CZERO_NEZ)
 /* Zihintntl hint instructions.  */
-DECLARE_INSN(ntl_p1, MATCH_NTL_P1, MASK_NTL_P1);
-DECLARE_INSN(ntl_pall, MATCH_NTL_PALL, MASK_NTL_PALL);
-DECLARE_INSN(ntl_s1, MATCH_NTL_S1, MASK_NTL_S1);
-DECLARE_INSN(ntl_all, MATCH_NTL_ALL, MASK_NTL_ALL);
-DECLARE_INSN(c_ntl_p1, MATCH_C_NTL_P1, MASK_C_NTL_P1);
-DECLARE_INSN(c_ntl_pall, MATCH_C_NTL_PALL, MASK_C_NTL_PALL);
-DECLARE_INSN(c_ntl_s1, MATCH_C_NTL_S1, MASK_C_NTL_S1);
-DECLARE_INSN(c_ntl_all, MATCH_C_NTL_ALL, MASK_C_NTL_ALL);
+DECLARE_INSN(ntl_p1, MATCH_NTL_P1, MASK_NTL_P1)
+DECLARE_INSN(ntl_pall, MATCH_NTL_PALL, MASK_NTL_PALL)
+DECLARE_INSN(ntl_s1, MATCH_NTL_S1, MASK_NTL_S1)
+DECLARE_INSN(ntl_all, MATCH_NTL_ALL, MASK_NTL_ALL)
+DECLARE_INSN(c_ntl_p1, MATCH_C_NTL_P1, MASK_C_NTL_P1)
+DECLARE_INSN(c_ntl_pall, MATCH_C_NTL_PALL, MASK_C_NTL_PALL)
+DECLARE_INSN(c_ntl_s1, MATCH_C_NTL_S1, MASK_C_NTL_S1)
+DECLARE_INSN(c_ntl_all, MATCH_C_NTL_ALL, MASK_C_NTL_ALL)
 /* Zawrs instructions.  */
 DECLARE_INSN(wrs_nto, MATCH_WRS_NTO, MASK_WRS_NTO)
 DECLARE_INSN(wrs_sto, MATCH_WRS_STO, MASK_WRS_STO)